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power.h

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00001 /* Copyright (c) 2006, 2007, 2008  Eric B. Weddington
00002    Copyright (c) 2011 Frédéric Nadeau
00003    All rights reserved.
00004 
00005    Redistribution and use in source and binary forms, with or without
00006    modification, are permitted provided that the following conditions are met:
00007 
00008    * Redistributions of source code must retain the above copyright
00009      notice, this list of conditions and the following disclaimer.
00010    * Redistributions in binary form must reproduce the above copyright
00011      notice, this list of conditions and the following disclaimer in
00012      the documentation and/or other materials provided with the
00013      distribution.
00014    * Neither the name of the copyright holders nor the names of
00015      contributors may be used to endorse or promote products derived
00016      from this software without specific prior written permission.
00017 
00018   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
00019   AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
00020   IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
00021   ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
00022   LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
00023   CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
00024   SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
00025   INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
00026   CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
00027   ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
00028   POSSIBILITY OF SUCH DAMAGE. */
00029 
00030 /* $Id$ */
00031 
00032 #ifndef _AVR_POWER_H_
00033 #define _AVR_POWER_H_   1
00034 
00035 #include <avr/io.h>
00036 #include <stdint.h>
00037 
00038 
00039 /** \file */
00040 /** \defgroup avr_power <avr/power.h>: Power Reduction Management
00041 
00042 \code #include <avr/power.h>\endcode
00043 
00044 Many AVRs contain a Power Reduction Register (PRR) or Registers (PRRx) that 
00045 allow you to reduce power consumption by disabling or enabling various on-board 
00046 peripherals as needed. Some devices have the XTAL Divide Control Register
00047 (XDIV) which offer similar functionality as System Clock Prescale
00048 Register (CLKPR).
00049 
00050 There are many macros in this header file that provide an easy interface
00051 to enable or disable on-board peripherals to reduce power. See the table below.
00052 
00053 \note Not all AVR devices have a Power Reduction Register (for example
00054 the ATmega8). On those devices without a Power Reduction Register, the
00055 power reduction macros are not available..
00056 
00057 \note Not all AVR devices contain the same peripherals (for example, the LCD
00058 interface), or they will be named differently (for example, USART and 
00059 USART0). Please consult your device's datasheet, or the header file, to 
00060 find out which macros are applicable to your device.
00061 
00062 \note For device using the XTAL Divide Control Register (XDIV), when prescaler
00063 is used, Timer/Counter0 can only be used in asynchronous mode. Keep in mind
00064 that Timer/Counter0 source shall be less than ¼th of peripheral clock.
00065 Therefore, when using a typical 32.768 kHz crystal, one shall not scale
00066 the clock below 131.072 kHz.
00067 
00068 */
00069 
00070 
00071 /** \addtogroup avr_power
00072 
00073 \anchor avr_powermacros
00074 <small>
00075 <center>
00076 <table border="3">
00077   <tr>
00078     <td width="10%"><strong>Power Macro</strong></td>
00079     <td width="15%"><strong>Description</strong></td>
00080     <td width="75%"><strong>Applicable for device</strong></td>
00081   </tr>
00082 
00083   <tr>
00084    <td>power_aca_disable()</td>
00085     <td> Disable The Analog Comparator On PortA </td>
00086     <td>ATxmega16C4, ATxmega32C4, ATxmega32C3, ATxmega64C3, ATxmega128C3, ATxmega192C3, ATxmega256C3, ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega32D3, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATxmega64D4, ATxmega128D4, ATxmega64B1, ATxmega64B3, ATxmega128B1, ATxmega128B3</td>
00087   </tr>
00088 
00089   <tr>
00090    <td>power_aca_enable()</td>
00091     <td> Enable The Analog Comparator On PortA </td>
00092     <td>ATxmega16C4, ATxmega32C4, ATxmega32C3, ATxmega64C3, ATxmega128C3, ATxmega192C3, ATxmega256C3, ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega32D3, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATxmega64D4, ATxmega128D4, ATxmega64B1, ATxmega64B3, ATxmega128B1, ATxmega128B3</td>
00093   </tr>
00094 
00095   <tr>
00096    <td>power_acb_disable()</td>
00097     <td> Disable The Analog Comparator On PortB </td>
00098     <td>ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega32D3, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATxmega64B1, ATxmega64B3, ATxmega128B1, ATxmega128B3</td>
00099   </tr>
00100 
00101   <tr>
00102    <td>power_acb_enable()</td>
00103     <td> Enable The Analog Comparator On PortB </td>
00104     <td>ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega32D3, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATxmega64B1, ATxmega64B3, ATxmega128B1, ATxmega128B3</td>
00105   </tr>
00106 
00107   <tr>
00108    <td>power_adc_disable()</td>
00109      <td>Disable the Analog to Digital Converter module.</td>
00110     <td>ATmega640, ATmega1280, ATmega1281, ATmega2560, ATmega2561, ATmega128RFA1, AT90USB646, AT90USB647, AT90USB1286, AT90USB1287, ATmega32U4, ATmega16U4, ATmega32U6, AT90PWM1, AT90PWM2, AT90PWM2B, AT90PWM3, AT90PWM3B, AT90PWM216, AT90PWM316, AT90PWM81, AT90PWM161, ATmega165, ATmega165A, ATmega165P, ATmega165PA, ATmega325, ATmega325A, ATmega325PA, ATmega3250, ATmega3250A, ATmega3250PA, ATmega645, ATmega645A, ATmega645P, ATmega6450, ATmega6450A, ATmega6450P, ATmega169, ATmega169A, ATmega169P, ATmega169PA, ATmega329, ATmega329A, ATmega329P, ATmega329PA, ATmega3290, ATmega3290A, ATmega3290P, ATmega3290PA, ATmega649, ATmega649A, ATmega649P, ATmega6490, ATmega6490A, ATmega6490P, ATmega164A, ATmega164P, ATmega324A, ATmega324P, ATmega324PA, ATmega644P, ATmega644A, ATmega644PA, ATmega644, ATmega164PA, ATmega48, ATmega48A, ATmega48PA, ATmega48P, ATmega88, ATmega88A, ATmega88P, ATmega88PA, ATmega168, ATmega168A, ATmega168P, ATmega168PA, ATmega328, ATmega328P, ATtiny48, ATtiny88, ATtiny828, ATtiny441, ATtiny24, ATtiny24A, ATtiny44, ATtiny44A, ATtiny84, ATtiny84A, ATtiny25, ATtiny45, ATtiny85, ATtiny261, ATtiny261A, ATtiny461, ATtiny461A, ATtiny861, ATtiny861A, ATtiny43U, ATmega1284, ATmega1284P, ATmega16M1, ATmega32C1, ATmega32M1, ATmega64C1, ATmega64M1, ATtiny167, ATtiny87, ATA5505, ATA5272, ATA6612C, ATA6613C, ATA6614Q, ATA6616C, ATA6617C, ATA664251, ATtiny1634, ATtiny4, ATtiny5, ATtiny9, ATtiny10, ATtiny13A, ATtiny20, ATtiny40</td>
00111   </tr>
00112 
00113   <tr>
00114    <td>power_adc_enable()</td>
00115      <td>Enable the Analog to Digital Converter module.</td>
00116     <td>ATmega640, ATmega1280, ATmega1281, ATmega2560, ATmega2561, ATmega128RFA1, AT90USB646, AT90USB647, AT90USB1286, AT90USB1287, ATmega32U4, ATmega16U4, ATmega32U6, AT90PWM1, AT90PWM2, AT90PWM2B, AT90PWM3, AT90PWM3B, AT90PWM216, AT90PWM316, AT90PWM81, AT90PWM161, ATmega165, ATmega165A, ATmega165P, ATmega165PA, ATmega325, ATmega325A, ATmega325PA, ATmega3250, ATmega3250A, ATmega3250PA, ATmega645, ATmega645A, ATmega645P, ATmega6450, ATmega6450A, ATmega6450P, ATmega169, ATmega169A, ATmega169P, ATmega169PA, ATmega329, ATmega329A, ATmega329P, ATmega329PA, ATmega3290, ATmega3290A, ATmega3290P, ATmega3290PA, ATmega649, ATmega649A, ATmega649P, ATmega6490, ATmega6490A, ATmega6490P, ATmega164A, ATmega164P, ATmega324A, ATmega324P, ATmega324PA, ATmega644P, ATmega644A, ATmega644PA, ATmega644, ATmega164PA, ATmega48, ATmega48A, ATmega48PA, ATmega48P, ATmega88, ATmega88A, ATmega88P, ATmega88PA, ATmega168, ATmega168A, ATmega168P, ATmega168PA, ATmega328, ATmega328P, ATtiny48, ATtiny88, ATtiny828, ATtiny441, ATtiny24, ATtiny24A, ATtiny44, ATtiny44A, ATtiny84, ATtiny84A, ATtiny25, ATtiny45, ATtiny85, ATtiny261, ATtiny261A, ATtiny461, ATtiny461A, ATtiny861, ATtiny861A, ATtiny43U, ATmega1284, ATmega1284P, ATmega16M1, ATmega32C1, ATmega32M1, ATmega64C1, ATmega64M1, ATtiny167, ATtiny87, ATA5505, ATA5272, ATA6612C, ATA6613C, ATA6614Q, ATA6616C, ATA6617C, ATA664251, ATtiny1634, ATtiny4, ATtiny5, ATtiny9, ATtiny10, ATtiny13A, ATtiny20, ATtiny40</td>
00117   </tr>
00118 
00119   <tr>
00120    <td>power_adca_disable()</td>
00121     <td> Disable the Analog to Digital Converter module On PortA </td>
00122     <td>ATxmega16C4, ATxmega32C4, ATxmega32C3, ATxmega64C3, ATxmega128C3, ATxmega192C3, ATxmega256C3, ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega32D3, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATxmega64D4, ATxmega128D4, ATxmega64B1, ATxmega64B3, ATxmega128B1, ATxmega128B3</td>
00123   </tr>
00124 
00125   <tr>
00126    <td>power_adca_enable()</td>
00127     <td> Enable the Analog to Digital Converter module On PortA </td>
00128     <td>ATxmega16C4, ATxmega32C4, ATxmega32C3, ATxmega64C3, ATxmega128C3, ATxmega192C3, ATxmega256C3, ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega32D3, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATxmega64D4, ATxmega128D4, ATxmega64B1, ATxmega64B3, ATxmega128B1, ATxmega128B3</td>
00129   </tr>
00130 
00131   <tr>
00132    <td>power_adcb_disable()</td>
00133     <td> Disable the Analog to Digital Converter module On PortB </td>
00134     <td>ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega32D3, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATxmega64B1, ATxmega64B3, ATxmega128B1, ATxmega128B3</td>
00135   </tr>
00136 
00137   <tr>
00138    <td>power_adcb_enable()</td>
00139     <td> Enable the Analog to Digital Converter module On PortB </td>
00140     <td>ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega32D3, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATxmega64B1, ATxmega64B3, ATxmega128B1, ATxmega128B3</td>
00141   </tr>
00142 
00143   <tr>
00144    <td>power_aes_disable()</td>
00145     <td> Disable the AES module </td>
00146     <td>ATxmega16A4, ATxmega16A4U, ATxmega32A4U, ATxmega32A4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega192A3, ATxmega192A3U, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATxmega16C4, ATxmega32C4, ATxmega32C3, ATxmega64C3, ATxmega128C3, ATxmega192C3, ATxmega256C3, ATxmega64B1, ATxmega64B3, ATxmega128B1, ATxmega128B3, AT90SCR100</td>
00147   </tr>
00148 
00149   <tr>
00150    <td>power_aes_enable()</td>
00151     <td> Enable the AES module </td>
00152     <td>ATxmega16A4, ATxmega16A4U, ATxmega32A4U, ATxmega32A4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega192A3, ATxmega192A3U, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATxmega16C4, ATxmega32C4, ATxmega32C3, ATxmega64C3, ATxmega128C3, ATxmega192C3, ATxmega256C3, ATxmega64B1, ATxmega64B3, ATxmega128B1, ATxmega128B3, AT90SCR100</td>
00153   </tr>
00154 
00155   <tr>
00156    <td>power_all_disable()</td>
00157      <td>Disable all modules.</td>
00158     <td>ATxmega384C3, ATxmega256A3BU, ATxmega16A4U, ATxmega32A4U, ATxmega64A3U, ATxmega64A4U, ATxmega128A3U, ATxmega128A4U, ATxmega192A3U, ATxmega256A3U, ATxmega384C3, ATxmega256A3BU, ATxmega16A4U, ATxmega32A4U, ATxmega64A3U, ATxmega64A4U, ATxmega128A3U, ATxmega128A4U, ATxmega192A3U, ATxmega256A3U, ATxmega16C4, ATxmega32C4, ATxmega32C3, ATxmega64C3, ATxmega128C3, ATxmega192C3, ATxmega256C3, ATxmega64D4, ATxmega128D4, ATxmega16D4, ATxmega32D4, ATxmega32D3, ATxmega64D3, ATxmega128D3, ATxmega192D3, ATxmega64B1, ATxmega64B3, ATxmega128B1, ATxmega128B3, ATmega640, ATmega1280, ATmega1281, ATmega2560, ATmega2561, ATmega128RFA1, AT90USB646, AT90USB647, AT90USB1286, AT90USB1287, ATmega32U4, ATmega16U4, ATmega32U6, AT90PWM1, AT90PWM2, AT90PWM2B, AT90PWM3, AT90PWM3B, AT90PWM216, AT90PWM316, AT90PWM81, AT90PWM161, ATmega165, ATmega165A, ATmega165P, ATmega165PA, ATmega325, ATmega325A, ATmega325PA, ATmega3250, ATmega3250A, ATmega3250PA, ATmega645, ATmega645A, ATmega645P, ATmega6450, ATmega6450A, ATmega6450P, ATmega169, ATmega169A, ATmega169P, ATmega169PA, ATmega329, ATmega329A, ATmega329P, ATmega329PA, ATmega3290, ATmega3290A, ATmega3290P, ATmega3290PA, ATmega649, ATmega649A, ATmega649P, ATmega6490, ATmega6490A, ATmega6490P, ATmega164A, ATmega164P, ATmega324A, ATmega324P, ATmega324PA, ATmega644P, ATmega644A, ATmega644PA, ATmega644, ATmega164PA, ATmega406, ATtiny828, ATtiny828, ATtiny441, ATtiny24, ATtiny24A, ATtiny44, ATtiny44A, ATtiny84, ATtiny84A, ATtiny25, ATtiny45, ATtiny85, ATtiny261, ATtiny261A, ATtiny461, ATtiny461A, ATtiny861, ATtiny861A, ATtiny43U, ATmega1284, ATmega1284P, ATmega32HVB, ATmega32HVBrevB, ATmega16HVB, ATmega16HVBrevB, ATA5790, ATA5795, ATmega16M1, ATmega32C1, ATmega32M1, ATmega64C1, ATmega64M1, ATtiny167, ATtiny87, ATA5505, ATA5272, ATA6616C, ATA6617C, ATA664251, ATtiny1634, AT90USB82, AT90USB162, ATmega8U2, ATmega16U2, ATmega32U2, AT90SCR100, ATtiny4, ATtiny5, ATtiny9, ATtiny10, ATtiny13A, ATtiny20, ATtiny40</td>
00159   </tr>
00160 
00161   <tr>
00162    <td>power_all_enable()</td>
00163      <td>Enable all modules.</td>
00164     <td>ATxmega384C3, ATxmega256A3BU, ATxmega16A4U, ATxmega32A4U, ATxmega64A3U, ATxmega64A4U, ATxmega128A3U, ATxmega128A4U, ATxmega192A3U, ATxmega256A3U, ATxmega384C3, ATxmega256A3BU, ATxmega16A4U, ATxmega32A4U, ATxmega64A3U, ATxmega64A4U, ATxmega128A3U, ATxmega128A4U, ATxmega192A3U, ATxmega256A3U, ATxmega16C4, ATxmega32C4, ATxmega32C3, ATxmega64C3, ATxmega128C3, ATxmega192C3, ATxmega256C3, ATxmega64D4, ATxmega128D4, ATxmega16D4, ATxmega32D4, ATxmega32D3, ATxmega64D3, ATxmega128D3, ATxmega192D3, ATxmega64B1, ATxmega64B3, ATxmega128B1, ATxmega128B3, ATmega640, ATmega1280, ATmega1281, ATmega2560, ATmega2561, ATmega128RFA1, AT90USB646, AT90USB647, AT90USB1286, AT90USB1287, ATmega32U4, ATmega16U4, ATmega32U6, AT90PWM1, AT90PWM2, AT90PWM2B, AT90PWM3, AT90PWM3B, AT90PWM216, AT90PWM316, AT90PWM81, AT90PWM161, ATmega165, ATmega165A, ATmega165P, ATmega165PA, ATmega325, ATmega325A, ATmega325PA, ATmega3250, ATmega3250A, ATmega3250PA, ATmega645, ATmega645A, ATmega645P, ATmega6450, ATmega6450A, ATmega6450P, ATmega169, ATmega169A, ATmega169P, ATmega169PA, ATmega329, ATmega329A, ATmega329P, ATmega329PA, ATmega3290, ATmega3290A, ATmega3290P, ATmega3290PA, ATmega649, ATmega649A, ATmega649P, ATmega6490, ATmega6490A, ATmega6490P, ATmega164A, ATmega164P, ATmega324A, ATmega324P, ATmega324PA, ATmega644P, ATmega644A, ATmega644PA, ATmega644, ATmega164PA, ATmega406, ATtiny828, ATtiny828, ATtiny441, ATtiny24, ATtiny24A, ATtiny44, ATtiny44A, ATtiny84, ATtiny84A, ATtiny25, ATtiny45, ATtiny85, ATtiny261, ATtiny261A, ATtiny461, ATtiny461A, ATtiny861, ATtiny861A, ATtiny43U, ATmega1284, ATmega1284P, ATmega32HVB, ATmega32HVBrevB, ATmega16HVB, ATmega16HVBrevB, ATA5790, ATA5795, ATmega16M1, ATmega32C1, ATmega32M1, ATmega64C1, ATmega64M1, ATtiny167, ATtiny87, ATA5505, ATA5272, ATA6616C, ATA6617C, ATA664251, ATtiny1634, AT90USB82, AT90USB162, ATmega8U2, ATmega16U2, ATmega32U2, AT90SCR100, ATtiny4, ATtiny5, ATtiny9, ATtiny10, ATtiny13A, ATtiny20, ATtiny40</td>
00165   </tr>
00166 
00167   <tr>
00168    <td>power_can_disable()</td>
00169     <td> Disable the CAN module </td>
00170     <td>ATmega16M1, ATmega32C1, ATmega32M1, ATmega64C1, ATmega64M1</td>
00171   </tr>
00172 
00173   <tr>
00174    <td>power_can_enable()</td>
00175     <td> Enable the CAN module </td>
00176     <td>ATmega16M1, ATmega32C1, ATmega32M1, ATmega64C1, ATmega64M1</td>
00177   </tr>
00178 
00179   <tr>
00180    <td>power_cinterface_disable()</td>
00181     <td> Disable the CINTERFACE module </td>
00182     <td>ATA5790, ATA5795, ATA5702M322</td>
00183   </tr>
00184 
00185   <tr>
00186    <td>power_cinterface_enable()</td>
00187     <td> Enable the CINTERFACE module </td>
00188     <td>ATA5790, ATA5795, ATA5702M322</td>
00189   </tr>
00190 
00191   <tr>
00192    <td>power_crypto_disable()</td>
00193     <td> Disable the CRYPTO module </td>
00194     <td>ATA5790, ATA5795, ATA5702M322</td>
00195   </tr>
00196 
00197   <tr>
00198    <td>power_crypto_enable()</td>
00199     <td> Enable the CRYPTO module </td>
00200     <td>ATA5790, ATA5795, ATA5702M322</td>
00201   </tr>
00202 
00203   <tr>
00204    <td>power_daca_disable()</td>
00205     <td> Disable the DAC module on PortA </td>
00206     <td>ATxmega16A4, ATxmega16A4U, ATxmega32A4U, ATxmega32A4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega192A3, ATxmega192A3U, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3</td>
00207   </tr>
00208 
00209   <tr>
00210    <td>power_daca_enable()</td>
00211     <td> Enable the DAC module on PortA </td>
00212     <td>ATxmega16A4, ATxmega16A4U, ATxmega32A4U, ATxmega32A4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega192A3, ATxmega192A3U, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3</td>
00213   </tr>
00214 
00215   <tr>
00216    <td>power_dacb_disable()</td>
00217     <td> Disable the DAC module on PortB </td>
00218     <td>ATxmega16A4, ATxmega16A4U, ATxmega32A4U, ATxmega32A4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega192A3, ATxmega192A3U, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3</td>
00219   </tr>
00220 
00221   <tr>
00222    <td>power_dacb_enable()</td>
00223     <td> Enable the DAC module on PortB </td>
00224     <td>ATxmega16A4, ATxmega16A4U, ATxmega32A4U, ATxmega32A4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega192A3, ATxmega192A3U, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3</td>
00225   </tr>
00226 
00227   <tr>
00228    <td>power_dma_disable()</td>
00229     <td> Disable the DMA module </td>
00230     <td>ATxmega16A4, ATxmega16A4U, ATxmega32A4U, ATxmega32A4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega192A3, ATxmega192A3U, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATxmega16C4, ATxmega32C4, ATxmega32C3, ATxmega64C3, ATxmega128C3, ATxmega192C3, ATxmega256C3, ATxmega64B1, ATxmega64B3, ATxmega128B1, ATxmega128B3</td>
00231   </tr>
00232 
00233   <tr>
00234    <td>power_dma_enable()</td>
00235     <td> Enable the DMA module </td>
00236     <td>ATxmega16A4, ATxmega16A4U, ATxmega32A4U, ATxmega32A4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega192A3, ATxmega192A3U, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATxmega16C4, ATxmega32C4, ATxmega32C3, ATxmega64C3, ATxmega128C3, ATxmega192C3, ATxmega256C3, ATxmega64B1, ATxmega64B3, ATxmega128B1, ATxmega128B3</td>
00237   </tr>
00238 
00239   <tr>
00240    <td>power_ebi_disable()</td>
00241     <td> Disable the EBI module </td>
00242     <td>ATxmega16A4, ATxmega16A4U, ATxmega32A4U, ATxmega32A4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega192A3, ATxmega192A3U, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3</td>
00243   </tr>
00244 
00245   <tr>
00246    <td>power_ebi_enable()</td>
00247     <td> Enable the EBI module </td>
00248     <td>ATxmega16A4, ATxmega16A4U, ATxmega32A4U, ATxmega32A4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega192A3, ATxmega192A3U, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3</td>
00249   </tr>
00250 
00251   <tr>
00252    <td>power_evsys_disable()</td>
00253     <td> Disable the EVSYS module </td>
00254     <td>ATxmega16C4, ATxmega32C4, ATxmega32C3, ATxmega64C3, ATxmega128C3, ATxmega192C3, ATxmega256C3, ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega32D3, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATxmega64D4, ATxmega128D4, ATxmega64B1, ATxmega64B3, ATxmega128B1, ATxmega128B3</td>
00255   </tr>
00256 
00257   <tr>
00258    <td>power_evsys_enable()</td>
00259     <td> Enable the EVSYS module </td>
00260     <td>ATxmega16C4, ATxmega32C4, ATxmega32C3, ATxmega64C3, ATxmega128C3, ATxmega192C3, ATxmega256C3, ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega32D3, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATxmega64D4, ATxmega128D4, ATxmega64B1, ATxmega64B3, ATxmega128B1, ATxmega128B3</td>
00261   </tr>
00262 
00263   <tr>
00264    <td>power_hiresc_disable()</td>
00265     <td> Disable the HIRES module on PortC </td>
00266     <td>ATxmega16C4, ATxmega32C4, ATxmega32C3, ATxmega64C3, ATxmega128C3, ATxmega192C3, ATxmega256C3, ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega32D3, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATxmega64D4, ATxmega128D4, ATxmega64B1, ATxmega64B3, ATxmega128B1, ATxmega128B3</td>
00267   </tr>
00268 
00269   <tr>
00270    <td>power_hiresc_enable()</td>
00271     <td> Enable the HIRES module on PortC </td>
00272     <td>ATxmega16C4, ATxmega32C4, ATxmega32C3, ATxmega64C3, ATxmega128C3, ATxmega192C3, ATxmega256C3, ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega32D3, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATxmega64D4, ATxmega128D4, ATxmega64B1, ATxmega64B3, ATxmega128B1, ATxmega128B3</td>
00273   </tr>
00274 
00275   <tr>
00276    <td>power_hiresd_disable()</td>
00277     <td> Disable the HIRES module on PortD </td>
00278     <td>ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega32D3, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3</td>
00279   </tr>
00280 
00281   <tr>
00282    <td>power_hiresd_enable()</td>
00283     <td> Enable the HIRES module on PortD </td>
00284     <td>ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega32D3, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3</td>
00285   </tr>
00286 
00287   <tr>
00288    <td>power_hirese_disable()</td>
00289     <td> Disable the HIRES module on PortE </td>
00290     <td>ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega32D3, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3</td>
00291   </tr>
00292 
00293   <tr>
00294    <td>power_hirese_enable()</td>
00295     <td> Enable the HIRES module on PortE </td>
00296     <td>ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega32D3, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3</td>
00297   </tr>
00298 
00299   <tr>
00300    <td>power_hiresf_disable()</td>
00301     <td> Disable the HIRES module on PortF </td>
00302     <td>ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega32D3, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3</td>
00303   </tr>
00304 
00305   <tr>
00306    <td>power_hiresf_enable()</td>
00307     <td> Enable the HIRES module on PortF </td>
00308     <td>ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega32D3, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3</td>
00309   </tr>
00310 
00311   <tr>
00312    <td>power_hsspi_disable()</td>
00313     <td> Disable the HSPPI module </td>
00314     <td>AT90SCR100</td>
00315   </tr>
00316 
00317   <tr>
00318    <td>power_hsspi_enable()</td>
00319     <td> Enable the HSPPI module </td>
00320     <td>AT90SCR100</td>
00321   </tr>
00322 
00323   <tr>
00324    <td>power_irdriver_disable()</td>
00325     <td> Disable the IRDRIVER module </td>
00326     <td>ATA5790, ATA5795</td>
00327   </tr>
00328 
00329   <tr>
00330    <td>power_irdriver_enable()</td>
00331     <td> Enable the IRDRIVER module </td>
00332     <td>ATA5790, ATA5795</td>
00333   </tr>
00334 
00335   <tr>
00336    <td>power_kb_disable()</td>
00337     <td> Disable the KB module </td>
00338     <td>AT90SCR100</td>
00339   </tr>
00340 
00341   <tr>
00342    <td>power_kb_enable()</td>
00343     <td> Enable the KB module </td>
00344     <td>AT90SCR100</td>
00345   </tr>
00346 
00347   <tr>
00348    <td>power_lcd_disable()</td>
00349      <td>Disable the LCD module.</td>
00350     <td>ATxmega64B1, ATxmega64B3, ATxmega128B1, ATxmega128B3, ATmega169, ATmega169A, ATmega169P, ATmega169PA, ATmega329, ATmega329A, ATmega329P, ATmega329PA, ATmega3290, ATmega3290A, ATmega3290P, ATmega3290PA, ATmega649, ATmega649A, ATmega649P, ATmega6490, ATmega6490A, ATmega6490P</td>
00351   </tr>
00352 
00353   <tr>
00354    <td>power_lcd_enable()</td>
00355      <td>Enable the LCD module.</td>
00356     <td>ATxmega64B1, ATxmega64B3, ATxmega128B1, ATxmega128B3, ATmega169, ATmega169A, ATmega169P, ATmega169PA, ATmega329, ATmega329A, ATmega329P, ATmega329PA, ATmega3290, ATmega3290A, ATmega3290P, ATmega3290PA, ATmega649, ATmega649A, ATmega649P, ATmega6490, ATmega6490A, ATmega6490P</td>
00357   </tr>
00358 
00359   <tr>
00360    <td>power_lfreceiver_disable()</td>
00361     <td> Disable the LFRECEIVER module </td>
00362     <td>ATA5790, ATA5702M322</td>
00363   </tr>
00364 
00365   <tr>
00366    <td>power_lfreceiver_enable()</td>
00367     <td> Enable the LFRECEIVER module </td>
00368     <td>ATA5790, ATA5702M322</td>
00369   </tr>
00370 
00371   <tr>
00372    <td>power_lin_disable()</td>
00373     <td> Disable the LIN module </td>
00374     <td>ATmega16M1, ATmega32C1, ATmega32M1, ATmega64C1, ATmega64M1, ATtiny167, ATtiny87, ATA5505, ATA5272, ATA6616C, ATA6617C, ATA664251</td>
00375   </tr>
00376 
00377   <tr>
00378    <td>power_lin_enable()</td>
00379     <td> Enable the LIN module </td>
00380     <td>ATmega16M1, ATmega32C1, ATmega32M1, ATmega64C1, ATmega64M1, ATtiny167, ATtiny87, ATA5505, ATA5272, ATA6616C, ATA6617C, ATA664251</td>
00381   </tr>
00382 
00383   <tr>
00384    <td>power_psc0_disable()</td>
00385      <td>Disable the Power Stage Controller 0 module.</td>
00386     <td>AT90PWM1, AT90PWM2, AT90PWM2B, AT90PWM3, AT90PWM3B, AT90PWM216, AT90PWM316</td>
00387   </tr>
00388 
00389   <tr>
00390    <td>power_psc0_enable()</td>
00391      <td>Enable the Power Stage Controller 0 module.</td>
00392     <td>AT90PWM1, AT90PWM2, AT90PWM2B, AT90PWM3, AT90PWM3B, AT90PWM216, AT90PWM316</td>
00393   </tr>
00394 
00395   <tr>
00396    <td>power_psc1_disable()</td>
00397      <td>Disable the Power Stage Controller 1 module.</td>
00398     <td>AT90PWM1, AT90PWM2, AT90PWM2B, AT90PWM3, AT90PWM3B, AT90PWM216, AT90PWM316</td>
00399   </tr>
00400 
00401   <tr>
00402    <td>power_psc1_enable()</td>
00403      <td>Enable the Power Stage Controller 1 module.</td>
00404     <td>AT90PWM1, AT90PWM2, AT90PWM2B, AT90PWM3, AT90PWM3B, AT90PWM216, AT90PWM316</td>
00405   </tr>
00406 
00407   <tr>
00408    <td>power_psc2_disable()</td>
00409      <td>Disable the Power Stage Controller 2 module.</td>
00410     <td>AT90PWM1, AT90PWM2, AT90PWM2B, AT90PWM3, AT90PWM3B, AT90PWM216, AT90PWM316, AT90PWM81, AT90PWM161</td>
00411   </tr>
00412 
00413   <tr>
00414    <td>power_psc2_enable()</td>
00415      <td>Enable the Power Stage Controller 2 module.</td>
00416     <td>AT90PWM1, AT90PWM2, AT90PWM2B, AT90PWM3, AT90PWM3B, AT90PWM216, AT90PWM316, AT90PWM81, AT90PWM161</td>
00417   </tr>
00418 
00419   <tr>
00420    <td>power_psc_disable()</td>
00421     <td> Disable the Power Stage Controller module </td>
00422     <td>ATmega16M1, ATmega32C1, ATmega32M1, ATmega64C1, ATmega64M1</td>
00423   </tr>
00424 
00425   <tr>
00426    <td>power_psc_enable()</td>
00427     <td> Enable the Power Stage Controller module </td>
00428     <td>ATmega16M1, ATmega32C1, ATmega32M1, ATmega64C1, ATmega64M1</td>
00429   </tr>
00430 
00431   <tr>
00432    <td>power_pscr_disable()</td>
00433      <td>Disable the Reduced Power Stage Controller module.</td>
00434     <td>AT90PWM81, AT90PWM161</td>
00435   </tr>
00436 
00437   <tr>
00438    <td>power_pscr_enable()</td>
00439      <td>Enable the Reduced Power Stage Controller module.</td>
00440     <td>AT90PWM81, AT90PWM161</td>
00441   </tr>
00442 
00443   <tr>
00444    <td>power_rtc_disable()</td>
00445     <td> Disable the RTC module </td>
00446     <td>ATxmega16C4, ATxmega32C4, ATxmega32C3, ATxmega64C3, ATxmega128C3, ATxmega192C3, ATxmega256C3, ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega32D3, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATxmega64D4, ATxmega128D4, ATxmega64B1, ATxmega64B3, ATxmega128B1, ATxmega128B3</td>
00447   </tr>
00448 
00449   <tr>
00450    <td>power_rtc_enable()</td>
00451     <td> Enable the RTC module </td>
00452     <td>ATxmega16C4, ATxmega32C4, ATxmega32C3, ATxmega64C3, ATxmega128C3, ATxmega192C3, ATxmega256C3, ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega32D3, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATxmega64D4, ATxmega128D4, ATxmega64B1, ATxmega64B3, ATxmega128B1, ATxmega128B3</td>
00453   </tr>
00454 
00455   <tr>
00456    <td>power_sci_disable()</td>
00457     <td> Disable the SCI module </td>
00458     <td>AT90SCR100</td>
00459   </tr>
00460 
00461   <tr>
00462    <td>power_sci_enable()</td>
00463     <td> Enable the SCI module </td>
00464     <td>AT90SCR100</td>
00465   </tr>
00466 
00467   <tr>
00468    <td>power_spi_disable()</td>
00469      <td>Disable the Serial Peripheral Interface module.</td>
00470     <td>ATmega640, ATmega1280, ATmega1281, ATmega2560, ATmega2561, ATmega128RFA1, AT90USB646, AT90USB647, AT90USB1286, AT90USB1287, ATmega32U4, ATmega16U4, ATmega32U6, AT90PWM1, AT90PWM2, AT90PWM2B, AT90PWM3, AT90PWM3B, AT90PWM216, AT90PWM316, AT90PWM81, AT90PWM161, ATmega165, ATmega165A, ATmega165P, ATmega165PA, ATmega325, ATmega325A, ATmega325PA, ATmega3250, ATmega3250A, ATmega3250PA, ATmega645, ATmega645A, ATmega645P, ATmega6450, ATmega6450A, ATmega6450P, ATmega169, ATmega169A, ATmega169P, ATmega169PA, ATmega329, ATmega329A, ATmega329P, ATmega329PA, ATmega3290, ATmega3290A, ATmega3290P, ATmega3290PA, ATmega649, ATmega649A, ATmega649P, ATmega6490, ATmega6490A, ATmega6490P, ATmega164A, ATmega164P, ATmega324A, ATmega324P, ATmega324PA, ATmega644P, ATmega644A, ATmega644PA, ATmega644, ATmega164PA, ATmega48, ATmega48A, ATmega48PA, ATmega48P, ATmega88, ATmega88A, ATmega88P, ATmega88PA, ATmega168, ATmega168A, ATmega168P, ATmega168PA, ATmega328, ATmega328P, ATtiny48, ATtiny88, ATtiny828, ATtiny441, ATmega1284, ATmega1284P, ATmega32HVB, ATmega32HVBrevB, ATmega16HVB, ATmega16HVBrevB, ATA5790, ATA5795, ATmega16M1, ATmega32C1, ATmega32M1, ATmega64C1, ATmega64M1, ATtiny167, ATtiny87, ATA5505, ATA5272, ATA6612C, ATA6613C, ATA6614Q, ATA6616C, ATA6617C, ATA664251, AT90USB82, AT90USB162, ATmega8U2, ATmega16U2, ATmega32U2, AT90SCR100, ATtiny20, ATtiny40</td>
00471   </tr>
00472 
00473   <tr>
00474    <td>power_spi_enable()</td>
00475      <td>Enable the Serial Peripheral Interface module.</td>
00476     <td>ATmega640, ATmega1280, ATmega1281, ATmega2560, ATmega2561, ATmega128RFA1, AT90USB646, AT90USB647, AT90USB1286, AT90USB1287, ATmega32U4, ATmega16U4, ATmega32U6, AT90PWM1, AT90PWM2, AT90PWM2B, AT90PWM3, AT90PWM3B, AT90PWM216, AT90PWM316, AT90PWM81, AT90PWM161, ATmega165, ATmega165A, ATmega165P, ATmega165PA, ATmega325, ATmega325A, ATmega325PA, ATmega3250, ATmega3250A, ATmega3250PA, ATmega645, ATmega645A, ATmega645P, ATmega6450, ATmega6450A, ATmega6450P, ATmega169, ATmega169A, ATmega169P, ATmega169PA, ATmega329, ATmega329A, ATmega329P, ATmega329PA, ATmega3290, ATmega3290A, ATmega3290P, ATmega3290PA, ATmega649, ATmega649A, ATmega649P, ATmega6490, ATmega6490A, ATmega6490P, ATmega164A, ATmega164P, ATmega324A, ATmega324P, ATmega324PA, ATmega644P, ATmega644A, ATmega644PA, ATmega644, ATmega164PA, ATmega48, ATmega48A, ATmega48PA, ATmega48P, ATmega88, ATmega88A, ATmega88P, ATmega88PA, ATmega168, ATmega168A, ATmega168P, ATmega168PA, ATmega328, ATmega328P, ATtiny48, ATtiny88, ATtiny828, ATtiny441, ATmega1284, ATmega1284P, ATmega32HVB, ATmega32HVBrevB, ATmega16HVB, ATmega16HVBrevB, ATA5790, ATA5795, ATmega16M1, ATmega32C1, ATmega32M1, ATmega64C1, ATmega64M1, ATtiny167, ATtiny87, ATA5505, ATA5272, ATA6612C, ATA6613C, ATA6614Q, ATA6616C, ATA6617C, ATA664251, AT90USB82, AT90USB162, ATmega8U2, ATmega16U2, ATmega32U2, AT90SCR100, ATtiny20, ATtiny40</td>
00477   </tr>
00478 
00479   <tr>
00480    <td>power_spic_disable()</td>
00481     <td> Disable the SPI module on PortC </td>
00482     <td>ATxmega16C4, ATxmega32C4, ATxmega32C3, ATxmega64C3, ATxmega128C3, ATxmega192C3, ATxmega256C3, ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega32D3, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATxmega64D4, ATxmega128D4, ATxmega64B1, ATxmega64B3, ATxmega128B1, ATxmega128B3</td>
00483   </tr>
00484 
00485   <tr>
00486    <td>power_spic_enable()</td>
00487     <td> Enable the SPI module on PortC </td>
00488     <td>ATxmega16C4, ATxmega32C4, ATxmega32C3, ATxmega64C3, ATxmega128C3, ATxmega192C3, ATxmega256C3, ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega32D3, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATxmega64D4, ATxmega128D4, ATxmega64B1, ATxmega64B3, ATxmega128B1, ATxmega128B3</td>
00489   </tr>
00490 
00491   <tr>
00492    <td>power_spid_disable()</td>
00493     <td> Disable the SPI module on PortD </td>
00494     <td>ATxmega16C4, ATxmega32C4, ATxmega32C3, ATxmega64C3, ATxmega128C3, ATxmega192C3, ATxmega256C3, ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega32D3, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATxmega64D4, ATxmega128D4</td>
00495   </tr>
00496 
00497   <tr>
00498    <td>power_spid_enable()</td>
00499     <td> Enable the SPI module on PortD </td>
00500     <td>ATxmega16C4, ATxmega32C4, ATxmega32C3, ATxmega64C3, ATxmega128C3, ATxmega192C3, ATxmega256C3, ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega32D3, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATxmega64D4, ATxmega128D4</td>
00501   </tr>
00502 
00503   <tr>
00504    <td>power_spie_disable()</td>
00505     <td> Disable the SPI module on PortE </td>
00506     <td>ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega32D3, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3</td>
00507   </tr>
00508 
00509   <tr>
00510    <td>power_spie_enable()</td>
00511     <td> Enable the SPI module on PortE </td>
00512     <td>ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega32D3, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3</td>
00513   </tr>
00514 
00515   <tr>
00516    <td>power_spif_disable()</td>
00517     <td> Disable the SPI module on PortF </td>
00518     <td>ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega32D3, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3</td>
00519   </tr>
00520 
00521   <tr>
00522    <td>power_spif_enable()</td>
00523     <td> Enable the SPI module on PortF </td>
00524     <td>ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega32D3, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3</td>
00525   </tr>
00526 
00527   <tr>
00528    <td>power_tc0c_disable()</td>
00529     <td> Disable the TC0 module on PortC </td>
00530     <td>ATxmega16C4, ATxmega32C4, ATxmega32C3, ATxmega64C3, ATxmega128C3, ATxmega192C3, ATxmega256C3, ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega32D3, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATxmega64D4, ATxmega128D4, ATxmega64B1, ATxmega64B3, ATxmega128B1, ATxmega128B3</td>
00531   </tr>
00532 
00533   <tr>
00534    <td>power_tc0c_enable()</td>
00535     <td> Enable the TC0 module on PortC </td>
00536     <td>ATxmega16C4, ATxmega32C4, ATxmega32C3, ATxmega64C3, ATxmega128C3, ATxmega192C3, ATxmega256C3, ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega32D3, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATxmega64D4, ATxmega128D4, ATxmega64B1, ATxmega64B3, ATxmega128B1, ATxmega128B3</td>
00537   </tr>
00538 
00539   <tr>
00540    <td>power_tc0d_disable()</td>
00541     <td> Disable the TC0 module on PortD </td>
00542     <td>ATxmega16C4, ATxmega32C4, ATxmega32C3, ATxmega64C3, ATxmega128C3, ATxmega192C3, ATxmega256C3, ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega32D3, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATxmega64D4, ATxmega128D4</td>
00543   </tr>
00544 
00545   <tr>
00546    <td>power_tc0d_enable()</td>
00547     <td> Enable the TC0 module on PortD </td>
00548     <td>ATxmega16C4, ATxmega32C4, ATxmega32C3, ATxmega64C3, ATxmega128C3, ATxmega192C3, ATxmega256C3, ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega32D3, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATxmega64D4, ATxmega128D4</td>
00549   </tr>
00550 
00551   <tr>
00552    <td>power_tc0e_disable()</td>
00553     <td> Disable the TC0 module on PortE </td>
00554     <td>ATxmega16C4, ATxmega32C4, ATxmega32C3, ATxmega64C3, ATxmega128C3, ATxmega192C3, ATxmega256C3, ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega32D3, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATxmega64D4, ATxmega128D4, ATxmega64B1, ATxmega64B3, ATxmega128B1, ATxmega128B3</td>
00555   </tr>
00556 
00557   <tr>
00558    <td>power_tc0e_enable()</td>
00559     <td> Enable the TC0 module on PortE </td>
00560     <td>ATxmega16C4, ATxmega32C4, ATxmega32C3, ATxmega64C3, ATxmega128C3, ATxmega192C3, ATxmega256C3, ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega32D3, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATxmega64D4, ATxmega128D4, ATxmega64B1, ATxmega64B3, ATxmega128B1, ATxmega128B3</td>
00561   </tr>
00562 
00563   <tr>
00564    <td>power_tc0f_disable()</td>
00565     <td> Disable the TC0 module on PortF </td>
00566     <td>ATxmega16C4, ATxmega32C4, ATxmega32C3, ATxmega64C3, ATxmega128C3, ATxmega192C3, ATxmega256C3, ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega32D3, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATxmega64D4, ATxmega128D4</td>
00567   </tr>
00568 
00569   <tr>
00570    <td>power_tc0f_enable()</td>
00571     <td> Enable the TC0 module on PortF </td>
00572     <td>ATxmega16C4, ATxmega32C4, ATxmega32C3, ATxmega64C3, ATxmega128C3, ATxmega192C3, ATxmega256C3, ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega32D3, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATxmega64D4, ATxmega128D4</td>
00573   </tr>
00574 
00575   <tr>
00576    <td>power_tc1c_disable()</td>
00577     <td> Disable the TC1 module on PortC </td>
00578     <td>ATxmega16C4, ATxmega32C4, ATxmega32C3, ATxmega64C3, ATxmega128C3, ATxmega192C3, ATxmega256C3, ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega32D3, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATxmega64D4, ATxmega128D4, ATxmega64B1, ATxmega64B3, ATxmega128B1, ATxmega128B3</td>
00579   </tr>
00580 
00581   <tr>
00582    <td>power_tc1c_enable()</td>
00583     <td> Enable the TC1 module on PortC </td>
00584     <td>ATxmega16C4, ATxmega32C4, ATxmega32C3, ATxmega64C3, ATxmega128C3, ATxmega192C3, ATxmega256C3, ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega32D3, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATxmega64D4, ATxmega128D4, ATxmega64B1, ATxmega64B3, ATxmega128B1, ATxmega128B3</td>
00585   </tr>
00586 
00587   <tr>
00588    <td>power_tc1d_disable()</td>
00589     <td> Disable the TC1 module on PortD </td>
00590     <td>ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega32D3, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3</td>
00591   </tr>
00592 
00593   <tr>
00594    <td>power_tc1d_enable()</td>
00595     <td> Enable the TC1 module on PortD </td>
00596     <td>ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega32D3, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3</td>
00597   </tr>
00598 
00599   <tr>
00600    <td>power_tc1e_disable()</td>
00601     <td> Disable the TC1 module on PortE </td>
00602     <td>ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega32D3, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3</td>
00603   </tr>
00604 
00605   <tr>
00606    <td>power_tc1e_enable()</td>
00607     <td> Enable the TC1 module on PortE </td>
00608     <td>ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega32D3, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3</td>
00609   </tr>
00610 
00611   <tr>
00612    <td>power_tc1f_disable()</td>
00613     <td> Disable the TC1 module on PortF </td>
00614     <td>ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega32D3, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3</td>
00615   </tr>
00616 
00617   <tr>
00618    <td>power_tc1f_enable()</td>
00619     <td> Enable the TC1 module on PortF </td>
00620     <td>ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega32D3, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3</td>
00621   </tr>
00622 
00623   <tr>
00624    <td>power_timer0_disable()</td>
00625      <td>Disable the Timer 0 module.</td>
00626     <td>ATmega640, ATmega1280, ATmega1281, ATmega2560, ATmega2561, ATmega128RFA1, AT90USB646, AT90USB647, AT90USB1286, AT90USB1287, ATmega32U4, ATmega16U4, ATmega32U6, AT90PWM1, AT90PWM2, AT90PWM2B, AT90PWM3, AT90PWM3B, AT90PWM216, AT90PWM316, ATmega164A, ATmega164P, ATmega324A, ATmega324P, ATmega324PA, ATmega644P, ATmega644A, ATmega644PA, ATmega644, ATmega164PA, ATmega406, ATmega48, ATmega48A, ATmega48PA, ATmega48P, ATmega88, ATmega88A, ATmega88P, ATmega88PA, ATmega168, ATmega168A, ATmega168P, ATmega168PA, ATmega328, ATmega328P, ATtiny48, ATtiny88, ATtiny828, ATtiny24, ATtiny24A, ATtiny44, ATtiny44A, ATtiny84, ATtiny84A, ATtiny25, ATtiny45, ATtiny85, ATtiny261, ATtiny261A, ATtiny441, ATtiny461, ATtiny461A, ATtiny861, ATtiny861A, ATtiny43U, ATmega1284, ATmega1284P, ATmega32HVB, ATmega32HVBrevB, ATmega16HVB, ATmega16HVBrevB, ATmega16M1, ATmega32C1, ATmega32M1, ATmega64C1, ATmega64M1, ATtiny167, ATtiny87, ATA5505, ATA5272, ATA6612C, ATA6613C, ATA6614Q, ATA6616C, ATA6617C, ATA664251, ATtiny1634, AT90USB82, AT90USB162, ATmega8U2, ATmega16U2, ATmega32U2, AT90SCR100, ATtiny4, ATtiny5, ATtiny9, ATtiny10, ATtiny13A, ATtiny20, ATtiny40</td>
00627   </tr>
00628 
00629   <tr>
00630    <td>power_timer0_enable()</td>
00631      <td>Enable the Timer 0 module.</td>
00632     <td>ATmega640, ATmega1280, ATmega1281, ATmega2560, ATmega2561, ATmega128RFA1, AT90USB646, AT90USB647, AT90USB1286, AT90USB1287, ATmega32U4, ATmega16U4, ATmega32U6, AT90PWM1, AT90PWM2, AT90PWM2B, AT90PWM3, AT90PWM3B, AT90PWM216, AT90PWM316, ATmega164A, ATmega164P, ATmega324A, ATmega324P, ATmega324PA, ATmega644P, ATmega644A, ATmega644PA, ATmega644, ATmega164PA, ATmega406, ATmega48, ATmega48A, ATmega48PA, ATmega48P, ATmega88, ATmega88A, ATmega88P, ATmega88PA, ATmega168, ATmega168A, ATmega168P, ATmega168PA, ATmega328, ATmega328P, ATtiny48, ATtiny88, ATtiny828, ATtiny24, ATtiny24A, ATtiny44, ATtiny44A, ATtiny84, ATtiny84A, ATtiny25, ATtiny45, ATtiny85, ATtiny261, ATtiny261A, ATtiny441, ATtiny461, ATtiny461A, ATtiny861, ATtiny861A, ATtiny43U, ATmega1284, ATmega1284P, ATmega32HVB, ATmega32HVBrevB, ATmega16HVB, ATmega16HVBrevB, ATmega16M1, ATmega32C1, ATmega32M1, ATmega64C1, ATmega64M1, ATtiny167, ATtiny87, ATA5505, ATA5272, ATA6612C, ATA6613C, ATA6614Q, ATA6616C, ATA6617C, ATA664251, ATtiny1634, AT90USB82, AT90USB162, ATmega8U2, ATmega16U2, ATmega32U2, AT90SCR100, ATtiny4, ATtiny5, ATtiny9, ATtiny10, ATtiny13A, ATtiny20, ATtiny40</td>
00633   </tr>
00634 
00635   <tr>
00636    <td>power_timer1_disable()</td>
00637      <td>Disable the Timer 1 module.</td>
00638     <td>ATmega640, ATmega1280, ATmega1281, ATmega2560, ATmega2561, ATmega128RFA1, AT90USB646, AT90USB647, AT90USB1286, AT90USB1287, ATmega32U4, ATmega16U4, ATmega32U6, AT90PWM1, AT90PWM2, AT90PWM2B, AT90PWM3, AT90PWM3B, AT90PWM216, AT90PWM316, AT90PWM81, AT90PWM161, ATmega165, ATmega165A, ATmega165P, ATmega165PA, ATmega325, ATmega325A, ATmega325PA, ATmega3250, ATmega3250A, ATmega3250PA, ATmega645, ATmega645A, ATmega645P, ATmega6450, ATmega6450A, ATmega6450P, ATmega169, ATmega169A, ATmega169P, ATmega169PA, ATmega329, ATmega329A, ATmega329P, ATmega329PA, ATmega3290, ATmega3290A, ATmega3290P, ATmega3290PA, ATmega649, ATmega649A, ATmega649P, ATmega6490, ATmega6490A, ATmega6490P, ATmega164A, ATmega164P, ATmega324A, ATmega324P, ATmega324PA, ATmega644P, ATmega644A, ATmega644PA, ATmega644, ATmega164PA, ATmega406, ATmega48, ATmega48A, ATmega48PA, ATmega48P, ATmega88, ATmega88A, ATmega88P, ATmega88PA, ATmega168, ATmega168A, ATmega168P, ATmega168PA, ATmega328, ATmega328P, ATtiny48, ATtiny88, ATtiny828, ATtiny441, ATtiny24, ATtiny24A, ATtiny44, ATtiny44A, ATtiny84, ATtiny84A, ATtiny25, ATtiny45, ATtiny85, ATtiny261, ATtiny261A, ATtiny461, ATtiny461A, ATtiny861, ATtiny861A, ATtiny43U, ATmega1284, ATmega1284P, ATmega32HVB, ATmega32HVBrevB, ATmega16HVB, ATmega16HVBrevB, ATA5790, ATA5795, ATmega16M1, ATmega32C1, ATmega32M1, ATmega64C1, ATmega64M1, ATtiny167, ATtiny87, ATA5505, ATA5272, ATA6612C, ATA6613C, ATA6614Q, ATA6616C, ATA6617C, ATA664251, ATtiny1634, AT90USB82, AT90USB162, ATmega8U2, ATmega16U2, ATmega32U2, AT90SCR100, ATtiny20, ATtiny40</td>
00639   </tr>
00640 
00641   <tr>
00642    <td>power_timer1_enable()</td>
00643      <td>Enable the Timer 1 module.</td>
00644     <td>ATmega640, ATmega1280, ATmega1281, ATmega2560, ATmega2561, ATmega128RFA1, AT90USB646, AT90USB647, AT90USB1286, AT90USB1287, ATmega32U4, ATmega16U4, ATmega32U6, AT90PWM1, AT90PWM2, AT90PWM2B, AT90PWM3, AT90PWM3B, AT90PWM216, AT90PWM316, AT90PWM81, AT90PWM161, ATmega165, ATmega165A, ATmega165P, ATmega165PA, ATmega325, ATmega325A, ATmega325PA, ATmega3250, ATmega3250A, ATmega3250PA, ATmega645, ATmega645A, ATmega645P, ATmega6450, ATmega6450A, ATmega6450P, ATmega169, ATmega169A, ATmega169P, ATmega169PA, ATmega329, ATmega329A, ATmega329P, ATmega329PA, ATmega3290, ATmega3290A, ATmega3290P, ATmega3290PA, ATmega649, ATmega649A, ATmega649P, ATmega6490, ATmega6490A, ATmega6490P, ATmega164A, ATmega164P, ATmega324A, ATmega324P, ATmega324PA, ATmega644P, ATmega644A, ATmega644PA, ATmega644, ATmega164PA, ATmega406, ATmega48, ATmega48A, ATmega48PA, ATmega48P, ATmega88, ATmega88A, ATmega88P, ATmega88PA, ATmega168, ATmega168A, ATmega168P, ATmega168PA, ATmega328, ATmega328P, ATtiny48, ATtiny88, ATtiny828, ATtiny441, ATtiny24, ATtiny24A, ATtiny44, ATtiny44A, ATtiny84, ATtiny84A, ATtiny25, ATtiny45, ATtiny85, ATtiny261, ATtiny261A, ATtiny461, ATtiny461A, ATtiny861, ATtiny861A, ATtiny43U, ATmega1284, ATmega1284P, ATmega32HVB, ATmega32HVBrevB, ATmega16HVB, ATmega16HVBrevB, ATA5790, ATA5795, ATmega16M1, ATmega32C1, ATmega32M1, ATmega64C1, ATmega64M1, ATtiny167, ATtiny87, ATA5505, ATA5272, ATA6612C, ATA6613C, ATA6614Q, ATA6616C, ATA6617C, ATA664251, ATtiny1634, AT90USB82, AT90USB162, ATmega8U2, ATmega16U2, ATmega32U2, AT90SCR100, ATtiny20, ATtiny40</td>
00645   </tr>
00646 
00647   <tr>
00648    <td>power_timer2_disable()</td>
00649      <td>Disable the Timer 2 module.</td>
00650     <td>ATmega640, ATmega1280, ATmega1281, ATmega2560, ATmega2561, ATmega128RFA1, AT90USB646, AT90USB647, AT90USB1286, AT90USB1287, ATmega32U4, ATmega16U4, ATmega32U6, ATmega164A, ATmega164P, ATmega324A, ATmega324P, ATmega324PA, ATmega644P, ATmega644A, ATmega644PA, ATmega644, ATmega164PA, ATmega48, ATmega48A, ATmega48PA, ATmega48P, ATmega88, ATmega88A, ATmega88P, ATmega88PA, ATmega168, ATmega168A, ATmega168P, ATmega168PA, ATmega328, ATmega328P, ATtiny48, ATtiny88, ATtiny828, ATtiny441, ATmega1284, ATmega1284P, ATA5790, ATA5795, ATA6612C, ATA6613C, ATA6614Q, AT90SCR100</td>
00651   </tr>
00652 
00653   <tr>
00654    <td>power_timer2_enable()</td>
00655      <td>Enable the Timer 2 module.</td>
00656     <td>ATmega640, ATmega1280, ATmega1281, ATmega2560, ATmega2561, ATmega128RFA1, AT90USB646, AT90USB647, AT90USB1286, AT90USB1287, ATmega32U4, ATmega16U4, ATmega32U6, ATmega164A, ATmega164P, ATmega324A, ATmega324P, ATmega324PA, ATmega644P, ATmega644A, ATmega644PA, ATmega644, ATmega164PA, ATmega48, ATmega48A, ATmega48PA, ATmega48P, ATmega88, ATmega88A, ATmega88P, ATmega88PA, ATmega168, ATmega168A, ATmega168P, ATmega168PA, ATmega328, ATmega328P, ATtiny48, ATtiny88, ATtiny828, ATtiny441, ATmega1284, ATmega1284P, ATA5790, ATA5795, ATA6612C, ATA6613C, ATA6614Q, AT90SCR100</td>
00657   </tr>
00658 
00659   <tr>
00660    <td>power_timer3_disable()</td>
00661      <td>Disable the Timer 3 module.</td>
00662     <td>ATmega640, ATmega1280, ATmega1281, ATmega2560, ATmega2561, ATmega128RFA1, AT90USB646, AT90USB647, AT90USB1286, AT90USB1287, ATmega32U4, ATmega16U4, ATmega32U6, ATmega1284, ATmega1284P, ATA5790, ATA5795</td>
00663   </tr>
00664 
00665   <tr>
00666    <td>power_timer3_enable()</td>
00667      <td>Enable the Timer 3 module.</td>
00668     <td>ATmega640, ATmega1280, ATmega1281, ATmega2560, ATmega2561, ATmega128RFA1, AT90USB646, AT90USB647, AT90USB1286, AT90USB1287, ATmega32U4, ATmega16U4, ATmega32U6, ATmega1284, ATmega1284P, ATA5790, ATA5795</td>
00669   </tr>
00670 
00671   <tr>
00672    <td>power_timer4_disable()</td>
00673      <td>Disable the Timer 4 module.</td>
00674     <td>ATmega640, ATmega1280, ATmega1281, ATmega2560, ATmega2561, ATmega128RFA1</td>
00675   </tr>
00676 
00677   <tr>
00678    <td>power_timer4_enable()</td>
00679      <td>Enable the Timer 4 module.</td>
00680     <td>ATmega640, ATmega1280, ATmega1281, ATmega2560, ATmega2561, ATmega128RFA1</td>
00681   </tr>
00682 
00683   <tr>
00684    <td>power_timermodulator_disable()</td>
00685     <td> Disable the TIMERMODULATOR module </td>
00686     <td>ATA5790, ATA5795</td>
00687   </tr>
00688 
00689   <tr>
00690    <td>power_timermodulator_enable()</td>
00691     <td> Enable the TIMERMODULATOR module </td>
00692     <td>ATA5790, ATA5795</td>
00693   </tr>
00694 
00695   <tr>
00696    <td>power_twi_disable()</td>
00697     <td>Disable the Two Wire Interface module.</td>
00698     <td>ATmega640, ATmega1280, ATmega1281, ATmega2560, ATmega2561, ATmega128RFA1, AT90USB646, AT90USB647, AT90USB1286, AT90USB1287, ATmega32U4, ATmega16U4, ATmega32U6, ATmega164A, ATmega164P, ATmega324A, ATmega324P, ATmega324PA, ATmega644P, ATmega644A, ATmega644PA, ATmega644, ATmega164PA, ATmega406, ATmega48, ATmega48A, ATmega48PA, ATmega48P, ATmega88, ATmega88A, ATmega88P, ATmega88PA, ATmega168, ATmega168A, ATmega168P, ATmega168PA, ATmega328, ATmega328P, ATtiny48, ATtiny88, ATtiny828, ATtiny441, ATmega1284, ATmega1284P, ATmega32HVB, ATmega32HVBrevB, ATmega16HVB, ATmega16HVBrevB, ATA6612C, ATA6613C, ATA6614Q, ATtiny1634, AT90SCR100, ATtiny20, ATtiny40, ATA5702M322</td>
00699   </tr>
00700 
00701   <tr>
00702    <td>power_twi_enable()</td>
00703     <td>Enable the Two Wire Interface module.</td>
00704     <td>ATmega640, ATmega1280, ATmega1281, ATmega2560, ATmega2561, ATmega128RFA1, AT90USB646, AT90USB647, AT90USB1286, AT90USB1287, ATmega32U4, ATmega16U4, ATmega32U6, ATmega164A, ATmega164P, ATmega324A, ATmega324P, ATmega324PA, ATmega644P, ATmega644A, ATmega644PA, ATmega644, ATmega164PA, ATmega406, ATmega48, ATmega48A, ATmega48PA, ATmega48P, ATmega88, ATmega88A, ATmega88P, ATmega88PA, ATmega168, ATmega168A, ATmega168P, ATmega168PA, ATmega328, ATmega328P, ATtiny48, ATtiny88, ATtiny828, ATtiny441, ATmega1284, ATmega1284P, ATmega32HVB, ATmega32HVBrevB, ATmega16HVB, ATmega16HVBrevB, ATA6612C, ATA6613C, ATA6614Q, ATtiny1634, AT90SCR100, ATtiny20, ATtiny40, ATA5702M322</td>
00705   </tr>
00706 
00707   <tr>
00708    <td>power_twic_disable()</td>
00709     <td>Disable the Two Wire Interface module on PortC </td>
00710     <td>ATxmega16C4, ATxmega32C4, ATxmega32C3, ATxmega64C3, ATxmega128C3, ATxmega192C3, ATxmega256C3, ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega32D3, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATxmega64D4, ATxmega128D4, ATxmega64B1, ATxmega64B3, ATxmega128B1, ATxmega128B3</td>
00711   </tr>
00712 
00713   <tr>
00714    <td>power_twic_enable()</td>
00715     <td>Enable the Two Wire Interface module on PortC </td>
00716     <td>ATxmega16C4, ATxmega32C4, ATxmega32C3, ATxmega64C3, ATxmega128C3, ATxmega192C3, ATxmega256C3, ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega32D3, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATxmega64D4, ATxmega128D4, ATxmega64B1, ATxmega64B3, ATxmega128B1, ATxmega128B3</td>
00717   </tr>
00718 
00719   <tr>
00720    <td>power_twid_disable()</td>
00721     <td>Disable the Two Wire Interface module on PortD </td>
00722     <td>ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega32D3, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3</td>
00723   </tr>
00724 
00725   <tr>
00726    <td>power_twid_enable()</td>
00727     <td>Enable the Two Wire Interface module on PortD </td>
00728     <td>ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega32D3, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3</td>
00729   </tr>
00730 
00731   <tr>
00732    <td>power_twie_disable()</td>
00733     <td>Disable the Two Wire Interface module on PortE </td>
00734     <td>ATxmega16C4, ATxmega32C4, ATxmega32C3, ATxmega64C3, ATxmega128C3, ATxmega192C3, ATxmega256C3, ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega32D3, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATxmega64D4, ATxmega128D4</td>
00735   </tr>
00736 
00737   <tr>
00738    <td>power_twie_enable()</td>
00739     <td>Enable the Two Wire Interface module on PortE </td>
00740     <td>ATxmega16C4, ATxmega32C4, ATxmega32C3, ATxmega64C3, ATxmega128C3, ATxmega192C3, ATxmega256C3, ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega32D3, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATxmega64D4, ATxmega128D4</td>
00741   </tr>
00742 
00743   <tr>
00744    <td>power_twif_disable()</td>
00745     <td>Disable the Two Wire Interface module on PortF </td>
00746     <td>ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega32D3, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3</td>
00747   </tr>
00748 
00749   <tr>
00750    <td>power_twif_enable()</td>
00751     <td>Disable the Two Wire Interface module on PortF </td>
00752     <td>ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega32D3, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3</td>
00753   </tr>
00754 
00755   <tr>
00756    <td>power_usart0_disable()</td>
00757      <td>Disable the USART 0 module.</td>
00758     <td>ATmega640, ATmega1280, ATmega1281, ATmega2560, ATmega2561, ATmega128RFA1, ATmega32U4, ATmega16U4, ATmega165, ATmega165A, ATmega165P, ATmega165PA, ATmega325, ATmega325A, ATmega325PA, ATmega3250, ATmega3250A, ATmega3250PA, ATmega645, ATmega645A, ATmega645P, ATmega6450, ATmega6450A, ATmega6450P, ATmega169, ATmega169A, ATmega169P, ATmega169PA, ATmega329, ATmega329A, ATmega329P, ATmega329PA, ATmega3290, ATmega3290A, ATmega3290P, ATmega3290PA, ATmega649, ATmega649A, ATmega649P, ATmega6490, ATmega6490A, ATmega6490P, ATmega164A, ATmega164P, ATmega324A, ATmega324P, ATmega324PA, ATmega644P, ATmega644A, ATmega644PA, ATmega644, ATmega164PA, ATmega48, ATmega48A, ATmega48PA, ATmega48P, ATmega88, ATmega88A, ATmega88P, ATmega88PA, ATmega168, ATmega168A, ATmega168P, ATmega168PA, ATmega328, ATmega328P, ATtiny48, ATtiny88, ATtiny828, ATtiny441, ATA6612C, ATA6613C, ATA6614Q, ATmega1284, ATmega1284P, ATtiny1634, AT90SCR100</td>
00759   </tr>
00760 
00761   <tr>
00762    <td>power_usart0_enable()</td>
00763      <td>Enable the USART 0 module.</td>
00764     <td>ATmega640, ATmega1280, ATmega1281, ATmega2560, ATmega2561, ATmega128RFA1, ATmega32U4, ATmega16U4, ATmega165, ATmega165A, ATmega165P, ATmega165PA, ATmega325, ATmega325A, ATmega325PA, ATmega3250, ATmega3250A, ATmega3250PA, ATmega645, ATmega645A, ATmega645P, ATmega6450, ATmega6450A, ATmega6450P, ATmega169, ATmega169A, ATmega169P, ATmega169PA, ATmega329, ATmega329A, ATmega329P, ATmega329PA, ATmega3290, ATmega3290A, ATmega3290P, ATmega3290PA, ATmega649, ATmega649A, ATmega649P, ATmega6490, ATmega6490A, ATmega6490P, ATmega164A, ATmega164P, ATmega324A, ATmega324P, ATmega324PA, ATmega644P, ATmega644A, ATmega644PA, ATmega644, ATmega164PA, ATmega48, ATmega48A, ATmega48PA, ATmega48P, ATmega88, ATmega88A, ATmega88P, ATmega88PA, ATmega168, ATmega168A, ATmega168P, ATmega168PA, ATmega328, ATmega328P, ATtiny48, ATtiny88, ATtiny828, ATtiny441, ATA6612C, ATA6613C, ATA6614Q, ATmega1284, ATmega1284P, ATtiny1634, AT90SCR100</td>
00765   </tr>
00766 
00767   <tr>
00768    <td>power_usart1_disable()</td>
00769      <td>Disable the USART 1 module.</td>
00770     <td>ATmega640, ATmega1280, ATmega1281, ATmega2560, ATmega2561, ATmega128RFA1, AT90USB646, AT90USB647, AT90USB1286, AT90USB1287, ATmega32U4, ATmega16U4, ATmega32U6, ATmega164A, ATmega164P, ATmega324A, ATmega324P, ATmega324PA, ATmega644P, ATmega644A, ATmega644PA, ATmega1284P, ATtiny441, ATtiny1634, AT90USB82, AT90USB162, ATmega8U2, ATmega16U2, ATmega32U2</td>
00771   </tr>
00772 
00773   <tr>
00774    <td>power_usart1_enable()</td>
00775      <td>Enable the USART 1 module.</td>
00776     <td>ATmega640, ATmega1280, ATmega1281, ATmega2560, ATmega2561, ATmega128RFA1, AT90USB646, AT90USB647, AT90USB1286, AT90USB1287, ATmega32U4, ATmega16U4, ATmega32U6, ATmega164A, ATmega164P, ATmega324A, ATmega324P, ATmega324PA, ATmega644P, ATmega644A, ATmega644PA, ATmega1284P, ATtiny441, ATtiny1634, AT90USB82, AT90USB162, ATmega8U2, ATmega16U2, ATmega32U2</td>
00777   </tr>
00778 
00779   <tr>
00780    <td>power_usart2_disable()</td>
00781      <td>Disable the USART 2 module.</td>
00782     <td>ATmega640, ATmega1280, ATmega1281, ATmega2560, ATmega2561</td>
00783   </tr>
00784 
00785   <tr>
00786    <td>power_usart2_enable()</td>
00787      <td>Enable the USART 2 module.</td>
00788     <td>ATmega640, ATmega1280, ATmega1281, ATmega2560, ATmega2561</td>
00789   </tr>
00790 
00791   <tr>
00792    <td>power_usart3_disable()</td>
00793      <td>Disable the USART 3 module.</td>
00794     <td>ATmega640, ATmega1280, ATmega1281, ATmega2560, ATmega2561</td>
00795   </tr>
00796 
00797   <tr>
00798    <td>power_usart3_enable()</td>
00799      <td>Enable the USART 3 module.</td>
00800     <td>ATmega640, ATmega1280, ATmega1281, ATmega2560, ATmega2561</td>
00801   </tr>
00802 
00803   <tr>
00804    <td>power_usart_disable()</td>
00805      <td>Disable the USART module.</td>
00806     <td>AT90PWM2, AT90PWM2B, AT90PWM3, AT90PWM3B, AT90PWM216, AT90PWM316</td>
00807   </tr>
00808 
00809   <tr>
00810    <td>power_usart_enable()</td>
00811      <td>Enable the USART module.</td>
00812     <td>AT90PWM2, AT90PWM2B, AT90PWM3, AT90PWM3B, AT90PWM216, AT90PWM316</td>
00813   </tr>
00814 
00815   <tr>
00816    <td>power_usartc0_disable()</td>
00817     <td> Disable the USART0 module on PortC </td>
00818     <td>ATxmega16C4, ATxmega32C4, ATxmega32C3, ATxmega64C3, ATxmega128C3, ATxmega192C3, ATxmega256C3, ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega32D3, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATxmega64D4, ATxmega128D4, ATxmega64B1, ATxmega64B3, ATxmega128B1, ATxmega128B3</td>
00819   </tr>
00820 
00821   <tr>
00822    <td>power_usartc0_enable()</td>
00823     <td> Enable the USART0 module on PortC </td>
00824     <td>ATxmega16C4, ATxmega32C4, ATxmega32C3, ATxmega64C3, ATxmega128C3, ATxmega192C3, ATxmega256C3, ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega32D3, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATxmega64D4, ATxmega128D4, ATxmega64B1, ATxmega64B3, ATxmega128B1, ATxmega128B3</td>
00825   </tr>
00826 
00827   <tr>
00828    <td>power_usartc1_disable()</td>
00829     <td> Disable the USART1 module on PortC </td>
00830     <td>ATxmega16A4, ATxmega16A4U, ATxmega32A4U, ATxmega32A4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega192A3, ATxmega192A3U, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATxmega16C4, ATxmega32C4, ATxmega32C3, ATxmega64C3, ATxmega128C3, ATxmega192C3, ATxmega256C3</td>
00831   </tr>
00832 
00833   <tr>
00834    <td>power_usartc1_enable()</td>
00835     <td> Enable the USART1 module on PortC </td>
00836     <td>ATxmega16A4, ATxmega16A4U, ATxmega32A4U, ATxmega32A4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega192A3, ATxmega192A3U, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATxmega16C4, ATxmega32C4, ATxmega32C3, ATxmega64C3, ATxmega128C3, ATxmega192C3, ATxmega256C3</td>
00837   </tr>
00838 
00839   <tr>
00840    <td>power_usartd0_disable()</td>
00841     <td> Disable the USART0 module on PortD </td>
00842     <td>ATxmega16C4, ATxmega32C4, ATxmega32C3, ATxmega64C3, ATxmega128C3, ATxmega192C3, ATxmega256C3, ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega32D3, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATxmega64D4, ATxmega128D4</td>
00843   </tr>
00844 
00845   <tr>
00846    <td>power_usartd0_enable()</td>
00847     <td> Enable the USART0 module on PortD </td>
00848     <td>ATxmega16C4, ATxmega32C4, ATxmega32C3, ATxmega64C3, ATxmega128C3, ATxmega192C3, ATxmega256C3, ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega32D3, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATxmega64D4, ATxmega128D4</td>
00849   </tr>
00850 
00851   <tr>
00852    <td>power_usartd1_disable()</td>
00853     <td> Disable the USART1 module on PortD </td>
00854     <td>ATxmega16A4, ATxmega16A4U, ATxmega32A4U, ATxmega32A4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega192A3, ATxmega192A3U, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3</td>
00855   </tr>
00856 
00857   <tr>
00858    <td>power_usartd1_enable()</td>
00859     <td> Enable the USART1 module on PortE </td>
00860     <td>ATxmega16A4, ATxmega16A4U, ATxmega32A4U, ATxmega32A4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega192A3, ATxmega192A3U, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3</td>
00861   </tr>
00862 
00863   <tr>
00864    <td>power_usarte0_disable()</td>
00865     <td> Disable the USART0 module on PortE </td>
00866     <td>ATxmega16C4, ATxmega32C4, ATxmega32C3, ATxmega64C3, ATxmega128C3, ATxmega192C3, ATxmega256C3, ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega32D3, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATxmega64D4, ATxmega128D4, ATxmega64B1, ATxmega64B3, ATxmega128B1, ATxmega128B3</td>
00867   </tr>
00868 
00869   <tr>
00870    <td>power_usarte0_enable()</td>
00871     <td> Enable the USART0 module on PortE </td>
00872     <td>ATxmega16C4, ATxmega32C4, ATxmega32C3, ATxmega64C3, ATxmega128C3, ATxmega192C3, ATxmega256C3, ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega32D3, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATxmega64D4, ATxmega128D4, ATxmega64B1, ATxmega64B3, ATxmega128B1, ATxmega128B3</td>
00873   </tr>
00874 
00875   <tr>
00876    <td>power_usarte1_disable()</td>
00877     <td> Disable the USART1 module on PortE </td>
00878     <td>ATxmega16A4, ATxmega16A4U, ATxmega32A4U, ATxmega32A4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega192A3, ATxmega192A3U, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3</td>
00879   </tr>
00880 
00881   <tr>
00882    <td>power_usarte1_enable()</td>
00883     <td> Enable the USART1 module on PortE </td>
00884     <td>ATxmega16A4, ATxmega16A4U, ATxmega32A4U, ATxmega32A4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega192A3, ATxmega192A3U, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3</td>
00885   </tr>
00886 
00887   <tr>
00888    <td>power_usartf0_disable()</td>
00889     <td> Disable the USART0 module on PortF </td>
00890     <td>ATxmega16C4, ATxmega32C4, ATxmega32C3, ATxmega64C3, ATxmega128C3, ATxmega192C3, ATxmega256C3, ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega32D3, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATxmega64D4, ATxmega128D4</td>
00891   </tr>
00892 
00893   <tr>
00894    <td>power_usartf0_enable()</td>
00895     <td> Enable the USART0 module on PortF </td>
00896     <td>ATxmega16C4, ATxmega32C4, ATxmega32C3, ATxmega64C3, ATxmega128C3, ATxmega192C3, ATxmega256C3, ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega32D3, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATxmega64D4, ATxmega128D4</td>
00897   </tr>
00898 
00899   <tr>
00900    <td>power_usartf1_disable()</td>
00901     <td> Disable the USART1 module on PortF </td>
00902     <td>ATxmega16A4, ATxmega16A4U, ATxmega32A4U, ATxmega32A4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega192A3, ATxmega192A3U, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3</td>
00903   </tr>
00904 
00905   <tr>
00906    <td>power_usartf1_enable()</td>
00907     <td> Enable the USART1 module on PortF </td>
00908     <td>ATxmega16A4, ATxmega16A4U, ATxmega32A4U, ATxmega32A4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega192A3, ATxmega192A3U, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3</td>
00909   </tr>
00910 
00911   <tr>
00912    <td>power_usb_disable()</td>
00913      <td>Disable the USB module.</td>
00914     <td>ATxmega384C3, ATxmega256A3BU, ATxmega16A4U, ATxmega32A4U, ATxmega64A3U, ATxmega64A4U, ATxmega128A3U, ATxmega128A4U, ATxmega192A3U, ATxmega256A3U, ATxmega16C4, ATxmega32C4, ATxmega32C3, ATxmega64C3, ATxmega128C3, ATxmega192C3, ATxmega256C3, ATxmega64B1, ATxmega64B3, ATxmega128B1, ATxmega128B3, AT90USB646, AT90USB647, AT90USB1286, AT90USB1287, ATmega32U4, ATmega16U4, ATmega32U6, AT90USB82, AT90USB162, ATmega8U2, ATmega16U2, ATmega32U2, AT90SCR100</td>
00915   </tr>
00916 
00917   <tr>
00918    <td>power_usb_enable()</td>
00919      <td>Enable the USB module.</td>
00920     <td>ATxmega384C3, ATxmega256A3BU, ATxmega16A4U, ATxmega32A4U, ATxmega64A3U, ATxmega64A4U, ATxmega128A3U, ATxmega128A4U, ATxmega192A3U, ATxmega256A3U, ATxmega16C4, ATxmega32C4, ATxmega32C3, ATxmega64C3, ATxmega128C3, ATxmega192C3, ATxmega256C3, ATxmega64B1, ATxmega64B3, ATxmega128B1, ATxmega128B3, AT90USB646, AT90USB647, AT90USB1286, AT90USB1287, ATmega32U4, ATmega16U4, ATmega32U6, AT90USB82, AT90USB162, ATmega8U2, ATmega16U2, ATmega32U2, AT90SCR100</td>
00921   </tr>
00922 
00923   <tr>
00924    <td>power_usbh_disable()</td>
00925     <td> Disable the USBH module </td>
00926     <td>AT90SCR100</td>
00927   </tr>
00928 
00929   <tr>
00930    <td>power_usbh_enable()</td>
00931     <td> Enable the USBH module </td>
00932     <td>AT90SCR100</td>
00933   </tr>
00934 
00935   <tr>
00936    <td>power_usi_disable()</td>
00937      <td>Disable the Universal Serial Interface module.</td>
00938     <td>ATtiny24, ATtiny24A, ATtiny44, ATtiny44A, ATtiny84, ATtiny84A, ATtiny25, ATtiny45, ATtiny85, ATtiny261, ATtiny261A, ATtiny461, ATtiny461A, ATtiny861, ATtiny861A, ATtiny43U, ATtiny167, ATtiny87, ATA5505, ATA5272, ATA6616C, ATA6617C, ATA664251, ATtiny1634</td>
00939   </tr>
00940 
00941   <tr>
00942    <td>power_usi_enable()</td>
00943      <td>Enable the Universal Serial Interface module.</td>
00944     <td>ATtiny24, ATtiny24A, ATtiny44, ATtiny44A, ATtiny84, ATtiny84A, ATtiny25, ATtiny45, ATtiny85, ATtiny261, ATtiny261A, ATtiny461, ATtiny461A, ATtiny861, ATtiny861A, ATtiny43U, ATtiny167, ATtiny87, ATA5505, ATA5272, ATA6616C, ATA6617C, ATA664251, ATtiny1634</td>
00945   </tr>
00946 
00947   <tr>
00948    <td>power_vadc_disable()</td>
00949      <td>Disable the Voltage ADC module.</td>
00950     <td>ATmega406, ATmega32HVB, ATmega32HVBrevB, ATmega16HVB, ATmega16HVBrevB</td>
00951   </tr>
00952 
00953   <tr>
00954    <td>power_vadc_enable()</td>
00955      <td>Enable the Voltage ADC module.</td>
00956     <td>ATmega406, ATmega32HVB, ATmega32HVBrevB, ATmega16HVB, ATmega16HVBrevB</td>
00957   </tr>
00958 
00959   <tr>
00960    <td>power_vmonitor_disable()</td>
00961     <td> Disable the VMONITOR module </td>
00962     <td>ATA5790, ATA5795</td>
00963   </tr>
00964 
00965   <tr>
00966    <td>power_vmonitor_enable()</td>
00967     <td> Enable the VMONITOR module </td>
00968     <td>ATA5790, ATA5795</td>
00969   </tr>
00970 
00971   <tr>
00972    <td>power_vrm_disable()</td>
00973     <td> Disable the VRM module </td>
00974     <td>ATmega32HVB, ATmega32HVBrevB, ATmega16HVB, ATmega16HVBrevB</td>
00975   </tr>
00976 
00977   <tr>
00978    <td>power_vrm_enable()</td>
00979     <td> Enable the VRM module </td>
00980     <td>ATmega32HVB, ATmega32HVBrevB, ATmega16HVB, ATmega16HVBrevB</td>
00981   </tr>
00982 
00983   <tr>
00984     <td>power_clock_output_enable()</td>
00985     <td>Enable clock output module</td>
00986     <td>ATA5702M322, ATA5782, ATA5831</td>
00987   </tr>
00988 
00989   <tr>
00990     <td>power_clock_output_disable()</td>
00991     <td>Enable clock output module</td>
00992     <td>ATA5702M322, ATA5782, ATA5831</td>
00993   </tr>
00994 
00995   <tr>
00996     <td>power_voltage_monitor_enable()</td>
00997     <td>Enable voltage monitor module</td>
00998     <td>ATA5702M322, ATA5782, ATA5831</td>
00999   </tr>
01000 
01001   <tr>
01002     <td>power_voltage_monitor_disable()</td>
01003     <td>Disable voltage monitor module</td>
01004     <td>ATA5702M322, ATA5782, ATA5831</td>
01005   </tr>
01006 
01007   <tr>
01008     <td>power_crc_enable()</td>
01009     <td>Enable CRC module</td>
01010     <td>ATA5702M322, ATA5782, ATA5831</td>
01011   </tr>
01012 
01013   <tr>
01014     <td>power_crc_disable()</td>
01015     <td>Disable CRC module</td>
01016     <td>ATA5702M322, ATA5782, ATA5831</td>
01017   </tr>
01018 
01019   <tr>
01020     <td>power_transmit_dsp_control_enable()</td>
01021     <td>Enable Transmit DSP control module</td>
01022     <td>ATA5702M322, ATA5782, ATA5831</td>
01023   </tr>
01024 
01025   <tr>
01026     <td>power_transmit_dsp_control_disable()</td>
01027     <td>Disable Transmit DSP control module</td>
01028     <td>ATA5702M322, ATA5782, ATA5831</td>
01029   </tr>
01030 
01031   <tr>
01032     <td>power_receive_dsp_control_enable()</td>
01033     <td>Enable Receive DSP control module</td>
01034     <td>ATA5782, ATA5831</td>
01035   </tr>
01036 
01037   <tr>
01038     <td>power_receive_dsp_control_disable()</td>
01039     <td>Disable Receive DSP control module</td>
01040     <td>ATA5782, ATA5831</td>
01041   </tr>
01042 
01043   <tr>
01044     <td>power_sequencer_state_machine_enable()</td>
01045     <td>Enable power sequencer state machine</td>
01046     <td>ATA5702M322, ATA5782, ATA5831</td>
01047   </tr>
01048 
01049   <tr>
01050     <td>power_sequencer_state_machine_disable()</td>
01051     <td>Disable power sequencer state machine</td>
01052     <td>ATA5702M322, ATA5782, ATA5831</td>
01053   </tr>
01054 
01055   <tr>
01056     <td>power_tx_modulator_enable()</td>
01057     <td>Enable Tx modulator</td>
01058     <td>ATA5702M322, ATA5782, ATA5831</td>
01059   </tr>
01060 
01061   <tr>
01062     <td>power_tx_modulator_disable()</td>
01063     <td>Disable Tx modulator</td>
01064     <td>ATA5702M322, ATA5782, ATA5831</td>
01065   </tr>
01066 
01067   <tr>
01068     <td>power_rssi_buffer_enable()</td>
01069     <td>Enable RSSI buffer</td>
01070     <td>ATA5782, ATA5831</td>
01071   </tr>
01072 
01073   <tr>
01074     <td>power_rssi_buffer_disable()</td>
01075     <td>Disable RSSI buffer</td>
01076     <td>ATA5782, ATA5831</td>
01077   </tr>
01078 
01079   <tr>
01080     <td>power_id_scan_enable()</td>
01081     <td>Enable ID Scan</td>
01082     <td>ATA5782, ATA5831</td>
01083   </tr>
01084 
01085   <tr>
01086     <td>power_id_scan_disable()</td>
01087     <td>Disable ID Scan</td>
01088     <td>ATA5782, ATA5831</td>
01089   </tr>
01090 
01091   <tr>
01092     <td>power_data_fifo_enable()</td>
01093     <td>Enable data FIFO</td>
01094     <td>ATA5702M322, ATA5782, ATA5831</td>
01095   </tr>
01096 
01097   <tr>
01098     <td>power_data_fifo_disable()</td>
01099     <td>Disable data FIFO</td>
01100     <td>ATA5702M322, ATA5782, ATA5831</td>
01101   </tr>
01102 
01103   <tr>
01104     <td>power_preamble_rssi_fifo_enable()</td>
01105     <td>Enable preamble/RSSI FIFO</td>
01106     <td>ATA5702M322, ATA5782, ATA5831</td>
01107   </tr>
01108 
01109   <tr>
01110     <td>power_preamble_rssi_fifo_disable()</td>
01111     <td>Disable preamble/RSSI FIFO</td>
01112     <td>ATA5702M322, ATA5782, ATA5831</td>
01113   </tr>
01114 
01115   <tr>
01116     <td>power_rx_buffer_A_enable()</td>
01117     <td>Enable receive buffer for data path A</td>
01118     <td>ATA5782, ATA5831</td>
01119   </tr>
01120 
01121   <tr>
01122     <td>power_rx_buffer_A_disable()</td>
01123     <td>Disable receive buffer for data path A</td>
01124     <td>ATA5782, ATA5831</td>
01125   </tr>
01126 
01127   <tr>
01128     <td>power_rx_buffer_B_enable()</td>
01129     <td>Enable receive buffer for data path B</td>
01130     <td>ATA5782, ATA5831</td>
01131   </tr>
01132 
01133   <tr>
01134     <td>power_rx_buffer_B_disable()</td>
01135     <td>Disable receive buffer for data path B</td>
01136     <td>ATA5782, ATA5831</td>
01137   </tr>
01138 
01139 </table>
01140 </center>
01141 </small>
01142 
01143 @} */
01144 
01145 // Xmega A series has AES, EBI and DMA bits
01146 // Include any other device on need basis
01147 #if defined(__AVR_ATxmega16A4__) \
01148 || defined(__AVR_ATxmega16A4U__) \
01149 || defined(__AVR_ATxmega32A4U__) \
01150 || defined(__AVR_ATxmega32A4__) \
01151 || defined(__AVR_ATxmega64A1__) \
01152 || defined(__AVR_ATxmega64A1U__) \
01153 || defined(__AVR_ATxmega64A3__) \
01154 || defined(__AVR_ATxmega64A3U__) \
01155 || defined(__AVR_ATxmega64A4U__) \
01156 || defined(__AVR_ATxmega128A1__) \
01157 || defined(__AVR_ATxmega128A1U__) \
01158 || defined(__AVR_ATxmega128A3__) \
01159 || defined(__AVR_ATxmega128A3U__) \
01160 || defined(__AVR_ATxmega128A4U__) \
01161 || defined(__AVR_ATxmega192A3__) \
01162 || defined(__AVR_ATxmega192A3U__) \
01163 || defined(__AVR_ATxmega256A3__) \
01164 || defined(__AVR_ATxmega256A3U__) \
01165 || defined(__AVR_ATxmega256A3B__) \
01166 || defined(__AVR_ATxmega256A3BU__) \
01167 || defined(__AVR_ATxmega384C3__)
01168 
01169 
01170 #define power_aes_enable()  (PR_PRGEN &= (uint8_t)~(PR_AES_bm))
01171 #define power_aes_disable() (PR_PRGEN |= (uint8_t)PR_AES_bm)
01172 
01173 #define power_ebi_enable()  (PR_PRGEN &= (uint8_t)~(PR_EBI_bm))
01174 #define power_ebi_disable() (PR_PRGEN |= (uint8_t)PR_EBI_bm)
01175 
01176 #define power_dma_enable()    (PR_PRGEN &= (uint8_t)~(PR_DMA_bm))
01177 #define power_dma_disable()   (PR_PRGEN |= (uint8_t)PR_DMA_bm)
01178 
01179 #define power_daca_enable()     (PR_PRPA &= (uint8_t)~(PR_DAC_bm))
01180 #define power_daca_disable()    (PR_PRPA |= (uint8_t)PR_DAC_bm)
01181 #define power_dacb_enable()     (PR_PRPB &= (uint8_t)~(PR_DAC_bm))
01182 #define power_dacb_disable()    (PR_PRPB |= (uint8_t)PR_DAC_bm)
01183 
01184 #define power_usartc1_enable()  (PR_PRPC &= (uint8_t)~(PR_USART1_bm))
01185 #define power_usartc1_disable() (PR_PRPC |= (uint8_t)PR_USART1_bm)
01186 #define power_usartd1_enable()  (PR_PRPD &= (uint8_t)~(PR_USART1_bm))
01187 #define power_usartd1_disable() (PR_PRPD |= (uint8_t)PR_USART1_bm)
01188 #define power_usarte1_enable()  (PR_PRPE &= (uint8_t)~(PR_USART1_bm))
01189 #define power_usarte1_disable() (PR_PRPE |= (uint8_t)PR_USART1_bm)
01190 #define power_usartf1_enable()  (PR_PRPF &= (uint8_t)~(PR_USART1_bm))
01191 #define power_usartf1_disable() (PR_PRPF |= (uint8_t)PR_USART1_bm)
01192 
01193 #if defined(__AVR_ATxmega384C3__) \
01194 || defined(__AVR_ATxmega256A3BU__) \
01195 || defined(__AVR_ATxmega16A4U__) \
01196 || defined(__AVR_ATxmega32A4U__) \
01197 || defined(__AVR_ATxmega64A3U__) \
01198 || defined(__AVR_ATxmega64A4U__) \
01199 || defined(__AVR_ATxmega128A3U__) \
01200 || defined(__AVR_ATxmega128A4U__) \
01201 || defined(__AVR_ATxmega192A3U__) \
01202 || defined(__AVR_ATxmega256A3U__) 
01203 
01204 #define power_usb_enable()   (PR_PRGEN &= (uint8_t)~(PR_USB_bm))
01205 #define power_usb_disable()  (PR_PRGEN &= (uint8_t)(PR_USB_bm))
01206 
01207 #define power_all_enable() \
01208 do { \
01209     PR_PRGEN &= (uint8_t)~(PR_AES_bm|PR_EBI_bm|PR_RTC_bm|PR_EVSYS_bm|PR_DMA_bm|PR_USB_bm); \
01210     PR_PRPA &= (uint8_t)~(PR_DAC_bm|PR_ADC_bm|PR_AC_bm); \
01211     PR_PRPB &= (uint8_t)~(PR_DAC_bm|PR_ADC_bm|PR_AC_bm); \
01212     PR_PRPC &= (uint8_t)~(PR_TWI_bm|PR_USART1_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
01213     PR_PRPD &= (uint8_t)~(PR_TWI_bm|PR_USART1_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
01214     PR_PRPE &= (uint8_t)~(PR_TWI_bm|PR_USART1_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
01215     PR_PRPF &= (uint8_t)~(PR_TWI_bm|PR_USART1_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
01216 } while(0)
01217 
01218 #define power_all_disable() \
01219 do { \
01220     PR_PRGEN |= (uint8_t)(PR_AES_bm|PR_EBI_bm|PR_RTC_bm|PR_EVSYS_bm|PR_DMA_bm|PR_USB_bm); \
01221     PR_PRPA |= (uint8_t)(PR_DAC_bm|PR_ADC_bm|PR_AC_bm); \
01222     PR_PRPB |= (uint8_t)(PR_DAC_bm|PR_ADC_bm|PR_AC_bm); \
01223     PR_PRPC |= (uint8_t)(PR_TWI_bm|PR_USART1_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
01224     PR_PRPD |= (uint8_t)(PR_TWI_bm|PR_USART1_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
01225     PR_PRPE |= (uint8_t)(PR_TWI_bm|PR_USART1_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
01226     PR_PRPF |= (uint8_t)(PR_TWI_bm|PR_USART1_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
01227 } while(0)
01228 
01229 #else
01230 
01231 #define power_all_enable() \
01232 do { \
01233     PR_PRGEN &= (uint8_t)~(PR_AES_bm|PR_EBI_bm|PR_RTC_bm|PR_EVSYS_bm|PR_DMA_bm); \
01234     PR_PRPA &= (uint8_t)~(PR_DAC_bm|PR_ADC_bm|PR_AC_bm); \
01235     PR_PRPB &= (uint8_t)~(PR_DAC_bm|PR_ADC_bm|PR_AC_bm); \
01236     PR_PRPC &= (uint8_t)~(PR_TWI_bm|PR_USART1_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
01237     PR_PRPD &= (uint8_t)~(PR_TWI_bm|PR_USART1_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
01238     PR_PRPE &= (uint8_t)~(PR_TWI_bm|PR_USART1_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
01239     PR_PRPF &= (uint8_t)~(PR_TWI_bm|PR_USART1_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
01240 } while(0)
01241 
01242 
01243 #define power_all_disable() \
01244 do { \
01245     PR_PRGEN|= (uint8_t)(PR_AES_bm|PR_EBI_bm|PR_RTC_bm|PR_EVSYS_bm|PR_DMA_bm); \
01246     PR_PRPA |= (uint8_t)(PR_DAC_bm|PR_ADC_bm|PR_AC_bm); \
01247     PR_PRPB |= (uint8_t)(PR_DAC_bm|PR_ADC_bm|PR_AC_bm); \
01248     PR_PRPC |= (uint8_t)(PR_TWI_bm|PR_USART1_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
01249     PR_PRPD |= (uint8_t)(PR_TWI_bm|PR_USART1_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
01250     PR_PRPE |= (uint8_t)(PR_TWI_bm|PR_USART1_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
01251     PR_PRPF |= (uint8_t)(PR_TWI_bm|PR_USART1_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
01252 } while(0)
01253 #endif
01254 
01255 #endif
01256 
01257 #if defined(__AVR_ATxmega16C4__) \
01258 || defined(__AVR_ATxmega32C3__) \
01259 || defined(__AVR_ATxmega32C4__) \
01260 || defined(__AVR_ATxmega64C3__) \
01261 || defined(__AVR_ATxmega128C3__) \
01262 || defined(__AVR_ATxmega192C3__) \
01263 || defined(__AVR_ATxmega256C3__) 
01264 
01265 #define power_usb_enable()   (PR_PRGEN &= (uint8_t)~(PR_USB_bm))
01266 #define power_usb_disable()  (PR_PRGEN &= (uint8_t)(PR_USB_bm))
01267 
01268 #define power_aes_enable()  (PR_PRGEN &= (uint8_t)~(PR_AES_bm))
01269 #define power_aes_disable() (PR_PRGEN |= (uint8_t)PR_AES_bm)
01270 
01271 #define power_rtc_enable()  (PR_PRGEN &= (uint8_t)~(PR_RTC_bm))
01272 #define power_rtc_disable() (PR_PRGEN |= (uint8_t)PR_RTC_bm)
01273 
01274 #define power_evsys_enable()    (PR_PRGEN &= (uint8_t)~(PR_EVSYS_bm))
01275 #define power_evsys_disable()   (PR_PRGEN |= (uint8_t)PR_EVSYS_bm)
01276 
01277 #define power_dma_enable()    (PR_PRGEN &= (uint8_t)~(PR_DMA_bm))
01278 #define power_dma_disable()   (PR_PRGEN |= (uint8_t)PR_DMA_bm)
01279 
01280 #define power_adca_enable()     (PR_PRPA &= (uint8_t)~(PR_ADC_bm))
01281 #define power_adca_disable()    (PR_PRPA |= (uint8_t)PR_ADC_bm)
01282 
01283 #define power_aca_enable()      (PR_PRPA &= (uint8_t)~(PR_AC_bm))
01284 #define power_aca_disable()     (PR_PRPA |= (uint8_t)PR_AC_bm)
01285 
01286 #define power_twic_enable()     (PR_PRPC &= (uint8_t)~(PR_TWI_bm))
01287 #define power_twic_disable()    (PR_PRPC |= (uint8_t)PR_TWI_bm)
01288 #define power_twie_enable()     (PR_PRPE &= (uint8_t)~(PR_TWI_bm))
01289 #define power_twie_disable()    (PR_PRPE |= (uint8_t)PR_TWI_bm)
01290 
01291 #define power_usartc1_enable()  (PR_PRPC &= (uint8_t)~(PR_USART1_bm))
01292 #define power_usartc1_disable() (PR_PRPC |= (uint8_t)PR_USART1_bm)
01293 
01294 #define power_usartc0_enable()  (PR_PRPC &= (uint8_t)~(PR_USART0_bm))
01295 #define power_usartc0_disable() (PR_PRPC |= (uint8_t)PR_USART0_bm)
01296 #define power_usartd0_enable()  (PR_PRPD &= (uint8_t)~(PR_USART0_bm))
01297 #define power_usartd0_disable() (PR_PRPD |= (uint8_t)PR_USART0_bm)
01298 #define power_usarte0_enable()  (PR_PRPE &= (uint8_t)~(PR_USART0_bm))
01299 #define power_usarte0_disable() (PR_PRPE |= (uint8_t)PR_USART0_bm)
01300 #define power_usartf0_enable()  (PR_PRPF &= (uint8_t)~(PR_USART0_bm))
01301 #define power_usartf0_disable() (PR_PRPF |= (uint8_t)PR_USART0_bm)
01302 
01303 #define power_spic_enable()     (PR_PRPC &= (uint8_t)~(PR_SPI_bm))
01304 #define power_spic_disable()    (PR_PRPC |= (uint8_t)PR_SPI_bm)
01305 #define power_spid_enable()     (PR_PRPD &= (uint8_t)~(PR_SPI_bm))
01306 #define power_spid_disable()    (PR_PRPD |= (uint8_t)PR_SPI_bm)
01307 
01308 #define power_hiresc_enable()   (PR_PRPC &= (uint8_t)~(PR_HIRES_bm))
01309 #define power_hiresc_disable()  (PR_PRPC |= (uint8_t)PR_HIRES_bm)
01310 
01311 #define power_tc1c_enable()     (PR_PRPC &= (uint8_t)~(PR_TC1_bm))
01312 #define power_tc1c_disable()    (PR_PRPC |= (uint8_t)PR_TC1_bm)
01313 
01314 #define power_tc0c_enable()     (PR_PRPC &= (uint8_t)~(PR_TC0_bm))
01315 #define power_tc0c_disable()    (PR_PRPC |= (uint8_t)PR_TC0_bm)
01316 #define power_tc0d_enable()     (PR_PRPD &= (uint8_t)~(PR_TC0_bm))
01317 #define power_tc0d_disable()    (PR_PRPD |= (uint8_t)PR_TC0_bm)
01318 #define power_tc0e_enable()     (PR_PRPE &= (uint8_t)~(PR_TC0_bm))
01319 #define power_tc0e_disable()    (PR_PRPE |= (uint8_t)PR_TC0_bm)
01320 #define power_tc0f_enable()     (PR_PRPF &= (uint8_t)~(PR_TC0_bm))
01321 #define power_tc0f_disable()    (PR_PRPF |= (uint8_t)PR_TC0_bm)
01322 
01323 #define power_all_enable() \
01324 do { \
01325     PR_PRGEN &= (uint8_t)~(PR_USB_bm|PR_AES_bm|PR_DMA_bm|PR_RTC_bm|PR_EVSYS_bm); \
01326     PR_PRPA &= (uint8_t)~(PR_ADC_bm|PR_AC_bm); \
01327     PR_PRPC &= (uint8_t)~(PR_TWI_bm|PR_USART0_bm|PR_USART1_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
01328     PR_PRPD &= (uint8_t)~(PR_USART0_bm|PR_SPI_bm|PR_TC0_bm); \
01329     PR_PRPE &= (uint8_t)~(PR_TWI_bm|PR_USART0_bm|PR_TC0_bm); \
01330     PR_PRPF &= (uint8_t)~(PR_USART0_bm|PR_TC0_bm); \
01331     } while(0)
01332 
01333 #define power_all_disable() \
01334 do { \
01335     PR_PRGEN |= (uint8_t)(PR_USB_bm|PR_AES_bm|PR_DMA_bm|PR_RTC_bm|PR_EVSYS_bm); \
01336     PR_PRPA |= (uint8_t)(PR_ADC_bm|PR_AC_bm); \
01337     PR_PRPC |= (uint8_t)(PR_TWI_bm|PR_USART0_bm|PR_USART1_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
01338     PR_PRPD |= (uint8_t)(PR_USART0_bm|PR_SPI_bm|PR_TC0_bm); \
01339     PR_PRPE |= (uint8_t)(PR_TWI_bm|PR_USART0_bm|PR_TC0_bm); \
01340     PR_PRPF |= (uint8_t)(PR_USART0_bm|PR_TC0_bm); \
01341     } while(0)
01342 
01343 #endif
01344 
01345 #if defined(__AVR_ATxmega16A4__) \
01346 || defined(__AVR_ATxmega16A4U__) \
01347 || defined(__AVR_ATxmega16D4__) \
01348 || defined(__AVR_ATxmega32A4__) \
01349 || defined(__AVR_ATxmega32A4U__) \
01350 || defined(__AVR_ATxmega32D3__) \
01351 || defined(__AVR_ATxmega32D4__) \
01352 || defined(__AVR_ATxmega64A1__) \
01353 || defined(__AVR_ATxmega64A1U__) \
01354 || defined(__AVR_ATxmega64A3__) \
01355 || defined(__AVR_ATxmega64A3U__) \
01356 || defined(__AVR_ATxmega64A4U__) \
01357 || defined(__AVR_ATxmega128A1__) \
01358 || defined(__AVR_ATxmega128A1U__) \
01359 || defined(__AVR_ATxmega128A3__) \
01360 || defined(__AVR_ATxmega128A3U__) \
01361 || defined(__AVR_ATxmega128A4U__) \
01362 || defined(__AVR_ATxmega192A3__) \
01363 || defined(__AVR_ATxmega192A3U__) \
01364 || defined(__AVR_ATxmega256A3__) \
01365 || defined(__AVR_ATxmega256A3U__) \
01366 || defined(__AVR_ATxmega256A3B__) \
01367 || defined(__AVR_ATxmega256A3BU__) \
01368 || defined(__AVR_ATxmega384C3__)
01369 
01370 
01371 #define power_rtc_enable()  (PR_PRGEN &= (uint8_t)~(PR_RTC_bm))
01372 #define power_rtc_disable() (PR_PRGEN |= (uint8_t)PR_RTC_bm)
01373 
01374 #define power_evsys_enable()    (PR_PRGEN &= (uint8_t)~(PR_EVSYS_bm))
01375 #define power_evsys_disable()   (PR_PRGEN |= (uint8_t)PR_EVSYS_bm)
01376 
01377 #define power_adca_enable()     (PR_PRPA &= (uint8_t)~(PR_ADC_bm))
01378 #define power_adca_disable()    (PR_PRPA |= (uint8_t)PR_ADC_bm)
01379 
01380 #ifndef __AVR_ATxmega32D3__
01381 #define power_adcb_enable()     (PR_PRPB &= (uint8_t)~(PR_ADC_bm))
01382 #define power_adcb_disable()    (PR_PRPB |= (uint8_t)PR_ADC_bm)
01383 #define power_acb_enable()      (PR_PRPB &= (uint8_t)~(PR_AC_bm))
01384 #define power_acb_disable()     (PR_PRPB |= (uint8_t)PR_AC_bm)
01385 #endif
01386 
01387 #define power_aca_enable()      (PR_PRPA &= (uint8_t)~(PR_AC_bm))
01388 #define power_aca_disable()     (PR_PRPA |= (uint8_t)PR_AC_bm)
01389 
01390 #define power_twic_enable()     (PR_PRPC &= (uint8_t)~(PR_TWI_bm))
01391 #define power_twic_disable()    (PR_PRPC |= (uint8_t)PR_TWI_bm)
01392 #define power_twid_enable()     (PR_PRPD &= (uint8_t)~(PR_TWI_bm))
01393 #define power_twid_disable()    (PR_PRPD |= (uint8_t)PR_TWI_bm)
01394 #define power_twie_enable()     (PR_PRPE &= (uint8_t)~(PR_TWI_bm))
01395 #define power_twie_disable()    (PR_PRPE |= (uint8_t)PR_TWI_bm)
01396 #define power_twif_enable()     (PR_PRPF &= (uint8_t)~(PR_TWI_bm))
01397 #define power_twif_disable()    (PR_PRPF |= (uint8_t)PR_TWI_bm)
01398 
01399 #define power_usartc0_enable()  (PR_PRPC &= (uint8_t)~(PR_USART0_bm))
01400 #define power_usartc0_disable() (PR_PRPC |= (uint8_t)PR_USART0_bm)
01401 #define power_usartd0_enable()  (PR_PRPD &= (uint8_t)~(PR_USART0_bm))
01402 #define power_usartd0_disable() (PR_PRPD |= (uint8_t)PR_USART0_bm)
01403 #define power_usarte0_enable()  (PR_PRPE &= (uint8_t)~(PR_USART0_bm))
01404 #define power_usarte0_disable() (PR_PRPE |= (uint8_t)PR_USART0_bm)
01405 #define power_usartf0_enable()  (PR_PRPF &= (uint8_t)~(PR_USART0_bm))
01406 #define power_usartf0_disable() (PR_PRPF |= (uint8_t)PR_USART0_bm)
01407 
01408 #define power_spic_enable()     (PR_PRPC &= (uint8_t)~(PR_SPI_bm))
01409 #define power_spic_disable()    (PR_PRPC |= (uint8_t)PR_SPI_bm)
01410 #define power_spid_enable()     (PR_PRPD &= (uint8_t)~(PR_SPI_bm))
01411 #define power_spid_disable()    (PR_PRPD |= (uint8_t)PR_SPI_bm)
01412 #define power_spie_enable()     (PR_PRPE &= (uint8_t)~(PR_SPI_bm))
01413 #define power_spie_disable()    (PR_PRPE |= (uint8_t)PR_SPI_bm)
01414 #define power_spif_enable()     (PR_PRPF &= (uint8_t)~(PR_SPI_bm))
01415 #define power_spif_disable()    (PR_PRPF |= (uint8_t)PR_SPI_bm)
01416 
01417 #define power_hiresc_enable()   (PR_PRPC &= (uint8_t)~(PR_HIRES_bm))
01418 #define power_hiresc_disable()  (PR_PRPC |= (uint8_t)PR_HIRES_bm)
01419 #define power_hiresd_enable()   (PR_PRPD &= (uint8_t)~(PR_HIRES_bm))
01420 #define power_hiresd_disable()  (PR_PRPD |= (uint8_t)PR_HIRES_bm)
01421 #define power_hirese_enable()   (PR_PRPE &= (uint8_t)~(PR_HIRES_bm))
01422 #define power_hirese_disable()  (PR_PRPE |= (uint8_t)PR_HIRES_bm)
01423 #define power_hiresf_enable()   (PR_PRPF &= (uint8_t)~(PR_HIRES_bm))
01424 #define power_hiresf_disable()  (PR_PRPF |= (uint8_t)PR_HIRES_bm)
01425 
01426 #define power_tc1c_enable()     (PR_PRPC &= (uint8_t)~(PR_TC1_bm))
01427 #define power_tc1c_disable()    (PR_PRPC |= (uint8_t)PR_TC1_bm)
01428 #define power_tc1d_enable()     (PR_PRPD &= (uint8_t)~(PR_TC1_bm))
01429 #define power_tc1d_disable()    (PR_PRPD |= (uint8_t)PR_TC1_bm)
01430 #define power_tc1e_enable()     (PR_PRPE &= (uint8_t)~(PR_TC1_bm))
01431 #define power_tc1e_disable()    (PR_PRPE |= (uint8_t)PR_TC1_bm)
01432 #define power_tc1f_enable()     (PR_PRPF &= (uint8_t)~(PR_TC1_bm))
01433 #define power_tc1f_disable()    (PR_PRPF |= (uint8_t)PR_TC1_bm)
01434 
01435 #define power_tc0c_enable()     (PR_PRPC &= (uint8_t)~(PR_TC0_bm))
01436 #define power_tc0c_disable()    (PR_PRPC |= (uint8_t)PR_TC0_bm)
01437 #define power_tc0d_enable()     (PR_PRPD &= (uint8_t)~(PR_TC0_bm))
01438 #define power_tc0d_disable()    (PR_PRPD |= (uint8_t)PR_TC0_bm)
01439 #define power_tc0e_enable()     (PR_PRPE &= (uint8_t)~(PR_TC0_bm))
01440 #define power_tc0e_disable()    (PR_PRPE |= (uint8_t)PR_TC0_bm)
01441 #define power_tc0f_enable()     (PR_PRPF &= (uint8_t)~(PR_TC0_bm))
01442 #define power_tc0f_disable()    (PR_PRPF |= (uint8_t)PR_TC0_bm)
01443 
01444 #endif
01445 
01446 #if defined(__AVR_ATxmega64D3__) \
01447 || defined(__AVR_ATxmega128D3__) \
01448 || defined(__AVR_ATxmega192D3__) \
01449 || defined(__AVR_ATxmega256D3__) 
01450 
01451 #define power_rtc_enable()      (PR_PRGEN &= (uint8_t)~(PR_RTC_bm))
01452 #define power_rtc_disable()     (PR_PRGEN |= (uint8_t)PR_RTC_bm)
01453 
01454 #define power_evsys_enable()    (PR_PRGEN &= (uint8_t)~(PR_EVSYS_bm))
01455 #define power_evsys_disable()   (PR_PRGEN |= (uint8_t)PR_EVSYS_bm)
01456 
01457 #define power_adca_enable()     (PR_PRPA &= (uint8_t)~(PR_ADC_bm))
01458 #define power_adca_disable()    (PR_PRPA |= (uint8_t)PR_ADC_bm)
01459 
01460 #define power_aca_enable()      (PR_PRPA &= (uint8_t)~(PR_AC_bm))
01461 #define power_aca_disable()     (PR_PRPA |= (uint8_t)PR_AC_bm)
01462 
01463 #define power_twic_enable()     (PR_PRPC &= (uint8_t)~(PR_TWI_bm))
01464 #define power_twic_disable()    (PR_PRPC |= (uint8_t)PR_TWI_bm)
01465 #define power_twie_enable()     (PR_PRPE &= (uint8_t)~(PR_TWI_bm))
01466 #define power_twie_disable()    (PR_PRPE |= (uint8_t)PR_TWI_bm)
01467 
01468 #define power_usartc0_enable()  (PR_PRPC &= (uint8_t)~(PR_USART0_bm))
01469 #define power_usartc0_disable() (PR_PRPC |= (uint8_t)PR_USART0_bm)
01470 #define power_usartd0_enable()  (PR_PRPD &= (uint8_t)~(PR_USART0_bm))
01471 #define power_usartd0_disable() (PR_PRPD |= (uint8_t)PR_USART0_bm)
01472 #define power_usarte0_enable()  (PR_PRPE &= (uint8_t)~(PR_USART0_bm))
01473 #define power_usarte0_disable() (PR_PRPE |= (uint8_t)PR_USART0_bm)
01474 #define power_usartf0_enable()  (PR_PRPF &= (uint8_t)~(PR_USART0_bm))
01475 #define power_usartf0_disable() (PR_PRPF |= (uint8_t)PR_USART0_bm)
01476 
01477 #define power_spic_enable()     (PR_PRPC &= (uint8_t)~(PR_SPI_bm))
01478 #define power_spic_disable()    (PR_PRPC |= (uint8_t)PR_SPI_bm)
01479 #define power_spid_enable()     (PR_PRPD &= (uint8_t)~(PR_SPI_bm))
01480 #define power_spid_disable()    (PR_PRPD |= (uint8_t)PR_SPI_bm)
01481 
01482 #define power_hiresc_enable()   (PR_PRPC &= (uint8_t)~(PR_HIRES_bm))
01483 #define power_hiresc_disable()  (PR_PRPC |= (uint8_t)PR_HIRES_bm)
01484 
01485 #define power_tc1c_enable()     (PR_PRPC &= (uint8_t)~(PR_TC1_bm))
01486 #define power_tc1c_disable()    (PR_PRPC |= (uint8_t)PR_TC1_bm)
01487 
01488 #define power_tc0c_enable()     (PR_PRPC &= (uint8_t)~(PR_TC0_bm))
01489 #define power_tc0c_disable()    (PR_PRPC |= (uint8_t)PR_TC0_bm)
01490 #define power_tc0d_enable()     (PR_PRPD &= (uint8_t)~(PR_TC0_bm))
01491 #define power_tc0d_disable()    (PR_PRPD |= (uint8_t)PR_TC0_bm)
01492 #define power_tc0e_enable()     (PR_PRPE &= (uint8_t)~(PR_TC0_bm))
01493 #define power_tc0e_disable()    (PR_PRPE |= (uint8_t)PR_TC0_bm)
01494 #define power_tc0f_enable()     (PR_PRPF &= (uint8_t)~(PR_TC0_bm))
01495 #define power_tc0f_disable()    (PR_PRPF |= (uint8_t)PR_TC0_bm)
01496 
01497 #define power_all_enable() \
01498 do { \
01499     PR_PRGEN &= (uint8_t)~(PR_RTC_bm|PR_EVSYS_bm); \
01500     PR_PRPA &= (uint8_t)~(PR_ADC_bm|PR_AC_bm); \
01501     PR_PRPC &= (uint8_t)~(PR_TWI_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
01502     PR_PRPD &= (uint8_t)~(PR_USART0_bm|PR_SPI_bm|PR_TC0_bm); \
01503     PR_PRPE &= (uint8_t)~(PR_TWI_bm|PR_USART0_bm|PR_TC0_bm); \
01504     PR_PRPF &= (uint8_t)~(PR_USART0_bm|PR_TC0_bm); \
01505 } while(0)
01506 
01507 
01508 #define power_all_disable() \
01509 do { \
01510     PR_PRGEN|= (uint8_t)(PR_RTC_bm|PR_EVSYS_bm); \
01511     PR_PRPA |= (uint8_t)(PR_ADC_bm|PR_AC_bm); \
01512     PR_PRPC |= (uint8_t)(PR_TWI_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
01513     PR_PRPD |= (uint8_t)(PR_USART0_bm|PR_SPI_bm|PR_TC0_bm); \
01514     PR_PRPE |= (uint8_t)(PR_TWI_bm|PR_USART0_bm|PR_TC0_bm); \
01515     PR_PRPF |= (uint8_t)(PR_USART0_bm|PR_TC0_bm); \
01516 } while(0)
01517 
01518 #endif
01519 
01520 #if defined(__AVR_ATxmega64D4__) \
01521 || defined(__AVR_ATxmega128D4__) 
01522 
01523 #define power_rtc_enable()  (PR_PRGEN &= (uint8_t)~(PR_RTC_bm))
01524 #define power_rtc_disable() (PR_PRGEN |= (uint8_t)PR_RTC_bm)
01525 
01526 #define power_evsys_enable()    (PR_PRGEN &= (uint8_t)~(PR_EVSYS_bm))
01527 #define power_evsys_disable()   (PR_PRGEN |= (uint8_t)PR_EVSYS_bm)
01528 
01529 #define power_adca_enable()     (PR_PRPA &= (uint8_t)~(PR_ADC_bm))
01530 #define power_adca_disable()    (PR_PRPA |= (uint8_t)PR_ADC_bm)
01531 
01532 #define power_aca_enable()      (PR_PRPA &= (uint8_t)~(PR_AC_bm))
01533 #define power_aca_disable()     (PR_PRPA |= (uint8_t)PR_AC_bm)
01534 
01535 #define power_twic_enable()     (PR_PRPC &= (uint8_t)~(PR_TWI_bm))
01536 #define power_twic_disable()    (PR_PRPC |= (uint8_t)PR_TWI_bm)
01537 #define power_twie_enable()     (PR_PRPE &= (uint8_t)~(PR_TWI_bm))
01538 #define power_twie_disable()    (PR_PRPE |= (uint8_t)PR_TWI_bm)
01539 
01540 #define power_usartc0_enable()  (PR_PRPC &= (uint8_t)~(PR_USART0_bm))
01541 #define power_usartc0_disable() (PR_PRPC |= (uint8_t)PR_USART0_bm)
01542 #define power_usartd0_enable()  (PR_PRPD &= (uint8_t)~(PR_USART0_bm))
01543 #define power_usartd0_disable() (PR_PRPD |= (uint8_t)PR_USART0_bm)
01544 #define power_usarte0_enable()  (PR_PRPE &= (uint8_t)~(PR_USART0_bm))
01545 #define power_usarte0_disable() (PR_PRPE |= (uint8_t)PR_USART0_bm)
01546 #define power_usartf0_enable()  (PR_PRPF &= (uint8_t)~(PR_USART0_bm))
01547 #define power_usartf0_disable() (PR_PRPF |= (uint8_t)PR_USART0_bm)
01548 
01549 #define power_spic_enable()     (PR_PRPC &= (uint8_t)~(PR_SPI_bm))
01550 #define power_spic_disable()    (PR_PRPC |= (uint8_t)PR_SPI_bm)
01551 #define power_spid_enable()     (PR_PRPD &= (uint8_t)~(PR_SPI_bm))
01552 #define power_spid_disable()    (PR_PRPD |= (uint8_t)PR_SPI_bm)
01553 
01554 #define power_hiresc_enable()   (PR_PRPC &= (uint8_t)~(PR_HIRES_bm))
01555 #define power_hiresc_disable()  (PR_PRPC |= (uint8_t)PR_HIRES_bm)
01556 
01557 #define power_tc1c_enable()     (PR_PRPC &= (uint8_t)~(PR_TC1_bm))
01558 #define power_tc1c_disable()    (PR_PRPC |= (uint8_t)PR_TC1_bm)
01559 
01560 #define power_tc0c_enable()     (PR_PRPC &= (uint8_t)~(PR_TC0_bm))
01561 #define power_tc0c_disable()    (PR_PRPC |= (uint8_t)PR_TC0_bm)
01562 #define power_tc0d_enable()     (PR_PRPD &= (uint8_t)~(PR_TC0_bm))
01563 #define power_tc0d_disable()    (PR_PRPD |= (uint8_t)PR_TC0_bm)
01564 #define power_tc0e_enable()     (PR_PRPE &= (uint8_t)~(PR_TC0_bm))
01565 #define power_tc0e_disable()    (PR_PRPE |= (uint8_t)PR_TC0_bm)
01566 #define power_tc0f_enable()     (PR_PRPF &= (uint8_t)~(PR_TC0_bm))
01567 #define power_tc0f_disable()    (PR_PRPF |= (uint8_t)PR_TC0_bm)
01568 
01569 #define power_all_enable() \
01570 do { \
01571     PR_PRGEN &= (uint8_t)~(PR_RTC_bm|PR_EVSYS_bm); \
01572     PR_PRPA &= (uint8_t)~(PR_ADC_bm|PR_AC_bm); \
01573     PR_PRPC &= (uint8_t)~(PR_TWI_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
01574     PR_PRPD &= (uint8_t)~(PR_USART0_bm|PR_SPI_bm|PR_TC0_bm); \
01575     PR_PRPE &= (uint8_t)~(PR_TWI_bm|PR_USART0_bm|PR_TC0_bm); \
01576     PR_PRPF &= (uint8_t)~(PR_USART0_bm|PR_TC0_bm); \
01577     } while(0)
01578 
01579 #define power_all_disable() \
01580 do { \
01581     PR_PRGEN |= (uint8_t)(PR_RTC_bm|PR_EVSYS_bm); \
01582     PR_PRPA |= (uint8_t)(PR_ADC_bm|PR_AC_bm); \
01583     PR_PRPC |= (uint8_t)(PR_TWI_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
01584     PR_PRPD |= (uint8_t)(PR_USART0_bm|PR_SPI_bm|PR_TC0_bm); \
01585     PR_PRPE |= (uint8_t)(PR_TWI_bm|PR_USART0_bm|PR_TC0_bm); \
01586     PR_PRPF |= (uint8_t)(PR_USART0_bm|PR_TC0_bm); \
01587     } while(0)
01588 
01589 #endif
01590 
01591 #if defined(__AVR_ATxmega16D4__) \
01592 || defined(__AVR_ATxmega32D3__) \
01593 || defined(__AVR_ATxmega32D4__) \
01594 
01595 #define power_all_enable() \
01596 do { \
01597     PR_PRGEN &= (uint8_t)~(PR_RTC_bm|PR_EVSYS_bm); \
01598     PR_PRPA &= (uint8_t)~(PR_ADC_bm|PR_AC_bm); \
01599     PR_PRPC &= (uint8_t)~(PR_TWI_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
01600     PR_PRPD &= (uint8_t)~(PR_TWI_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
01601     PR_PRPE &= (uint8_t)~(PR_TWI_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
01602     PR_PRPF &= (uint8_t)~(PR_TWI_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
01603 } while(0)
01604 
01605 
01606 #define power_all_disable() \
01607 do { \
01608     PR_PRGEN|= (uint8_t)(PR_RTC_bm|PR_EVSYS_bm); \
01609     PR_PRPA |= (uint8_t)(PR_ADC_bm|PR_AC_bm); \
01610     PR_PRPC |= (uint8_t)(PR_TWI_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
01611     PR_PRPD |= (uint8_t)(PR_TWI_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
01612     PR_PRPE |= (uint8_t)(PR_TWI_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
01613     PR_PRPF |= (uint8_t)(PR_TWI_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
01614 } while(0)
01615 
01616 
01617 #elif defined(__AVR_ATxmega32E5__) \
01618 || defined(__AVR_ATxmega16E5__) \
01619 || defined(__AVR_ATxmega8E5__) 
01620 
01621 #define power_xcl_enable()      (PR_PRGEN &= (uint8_t)~(PR_XCL_bm))
01622 #define power_xcl_disable()     (PR_PRGEN |= (uint8_t)PR_XCL_bm)
01623 
01624 #define power_rtc_enable()      (PR_PRGEN &= (uint8_t)~(PR_RTC_bm)) 
01625 #define power_rtc_disable()     (PR_PRGEN |= (uint8_t)PR_RTC_bm)
01626 
01627 #define power_evsys_enable()    (PR_PRGEN &= (uint8_t)~(PR_EVSYS_bm)) 
01628 #define power_evsys_disable()   (PR_PRGEN |= (uint8_t)PR_EVSYS_bm)
01629 
01630 #define power_edma_enable()     (PR_PRGEN &= (uint8_t)~(PR_EDMA_bm))
01631 #define power_edma_disable()    (PR_PRGEN |= (uint8_t)PR_EDMA_bm)
01632 
01633 #define power_daca_enable()      (PR_PRPA  &= (uint8_t)~(PR_DAC_bm))
01634 #define power_daca_disable()     (PR_PRPA  |= (uint8_t)PR_DAC_bm)
01635 
01636 #define power_adca_enable()      (PR_PRPA  &= (uint8_t)~(PR_ADC_bm))
01637 #define power_adca_disable()     (PR_PRPA  |= (uint8_t)PR_ADC_bm)
01638 
01639 #define power_aca_enable()       (PR_PRPA  &= (uint8_t)~(PR_AC_bm))
01640 #define power_aca_disable()      (PR_PRPA  |= (uint8_t)PR_AC_bm)
01641 
01642 #define power_twic_enable()      (PR_PRPC  &= (uint8_t)~(PR_TWI_bm))
01643 #define power_twic_disable()     (PR_PRPC  |= (uint8_t)PR_TWI_bm)
01644 
01645 #define power_usartc0_enable()   (PR_PRPC  &= (uint8_t)~(PR_USART0_bm))
01646 #define power_usartc0_disable()  (PR_PRPC  |= (uint8_t)PR_USART0_bm)
01647 
01648 #define power_spic_enable()      (PR_PRPC  &= (uint8_t)~(PR_SPI_bm))
01649 #define power_spic_disable()     (PR_PRPC  |= (uint8_t)PR_SPI_bm)
01650 
01651 #define power_hiresc_enable()    (PR_PRPC  &= (uint8_t)~(PR_HIRES_bm))
01652 #define power_hiresc_disable()   (PR_PRPC  |= (uint8_t)PR_HIRES_bm)
01653 
01654 #define power_tc5c_enable()      (PR_PRPC  &= (uint8_t)~(PR_TC5_bm))
01655 #define power_tc5c_disable()     (PR_PRPC  |= (uint8_t)PR_TC5_bm)
01656 
01657 #define power_tc4c_enable()      (PR_PRPC  &= (uint8_t)~(PR_TC4_bm))
01658 #define power_tc4c_disable()     (PR_PRPC  |= (uint8_t)PR_TC4_bm)
01659 
01660 #define power_usartd0_enable()   (PR_PRPD  &= (uint8_t)~(PR_USART0_bm))  
01661 #define power_usartd0_disable()  (PR_PRPD  |= (uint8_t)PR_USART0_bm)
01662 
01663 #define power_tc5d_enable()      (PR_PRPC  &= (uint8_t)~(PR_TC5_bm)) 
01664 #define power_tc5d_disable()     (PR_PRPC  |= (uint8_t)PR_TC5_bm) 
01665 
01666 #define power_all_enable() \
01667 do { \
01668     PR_PRGEN &= (uint8_t)~(PR_RTC_bm|PR_EVSYS_bm|PR_XCL_bm|PR_EDMA_bm); \
01669     PR_PRPA  &= (uint8_t)~(PR_ADC_bm|PR_AC_bm|PR_DAC_bm); \
01670     PR_PRPC  &= (uint8_t)~(PR_TWI_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC5_bm|PR_TC4_bm); \
01671     PR_PRPD  &= (uint8_t)~(PR_USART0_bm|PR_TC5_bm); \
01672 } while(0)
01673 
01674 
01675 #define power_all_disable() \
01676 do { \
01677     PR_PRGEN|= (uint8_t)(PR_XCL_bm|PR_RTC_bm|PR_EVSYS_bm|PR_EDMA_bm); \
01678     PR_PRPA |= (uint8_t)(PR_ADC_bm|PR_AC_bm|PR_DAC_bm); \
01679     PR_PRPC |= (uint8_t)(PR_TWI_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC5_bm|PR_TC4_bm); \
01680     PR_PRPD |= (uint8_t)(PR_USART0_bm|PR_TC5_bm); \
01681 } while(0)
01682 
01683 
01684 #elif defined (__AVR_ATxmega64B1__) \
01685 || defined (__AVR_ATxmega64B3__) \
01686 || defined (__AVR_ATxmega128B1__) \
01687 || defined (__AVR_ATxmega128B3__) 
01688 #define power_lcd_enable()  (PR_PRGEN &= (uint8_t)~(PR_LCD_bm))
01689 #define power_lcd_disable() (PR_PRGEN |= (uint8_t)PR_LCD_bm)
01690 
01691 #define power_usb_enable()  (PR_PRGEN &= (uint8_t)~(PR_USB_bm))
01692 #define power_usb_disable() (PR_PRGEN |= (uint8_t)PR_USB_bm)
01693 
01694 #define power_aes_enable()  (PR_PRGEN &= (uint8_t)~(PR_AES_bm))
01695 #define power_aes_disable() (PR_PRGEN |= (uint8_t)PR_AES_bm)
01696 
01697 #define power_rtc_enable()  (PR_PRGEN &= (uint8_t)~(PR_RTC_bm))
01698 #define power_rtc_disable() (PR_PRGEN |= (uint8_t)PR_RTC_bm)
01699 
01700 #define power_evsys_enable()    (PR_PRGEN &= (uint8_t)~(PR_EVSYS_bm))
01701 #define power_evsys_disable()   (PR_PRGEN |= (uint8_t)PR_EVSYS_bm)
01702 
01703 #define power_dma_enable()    (PR_PRGEN &= (uint8_t)~(PR_DMA_bm))
01704 #define power_dma_disable()   (PR_PRGEN |= (uint8_t)PR_DMA_bm)
01705 
01706 #define power_adca_enable()     (PR_PRPA &= (uint8_t)~(PR_ADC_bm))
01707 #define power_adca_disable()    (PR_PRPA |= (uint8_t)PR_ADC_bm)
01708 #define power_adcb_enable()     (PR_PRPB &= (uint8_t)~(PR_ADC_bm))
01709 #define power_adcb_disable()    (PR_PRPB |= (uint8_t)PR_ADC_bm)
01710 
01711 #define power_aca_enable()      (PR_PRPA &= (uint8_t)~(PR_AC_bm))
01712 #define power_aca_disable()     (PR_PRPA |= (uint8_t)PR_AC_bm)
01713 #define power_acb_enable()      (PR_PRPB &= (uint8_t)~(PR_AC_bm))
01714 #define power_acb_disable()     (PR_PRPB |= (uint8_t)PR_AC_bm)
01715 
01716 #define power_twic_enable()     (PR_PRPC &= (uint8_t)~(PR_TWI_bm))
01717 #define power_twic_disable()    (PR_PRPC |= (uint8_t)PR_TWI_bm)
01718 
01719 #define power_usartc0_enable()  (PR_PRPC &= (uint8_t)~(PR_USART0_bm))
01720 #define power_usartc0_disable() (PR_PRPC |= (uint8_t)PR_USART0_bm)
01721 #define power_usarte0_enable()  (PR_PRPE &= (uint8_t)~(PR_USART0_bm))
01722 #define power_usarte0_disable() (PR_PRPE |= (uint8_t)PR_USART0_bm)
01723 
01724 #define power_spic_enable()     (PR_PRPC &= (uint8_t)~(PR_SPI_bm))
01725 #define power_spic_disable()    (PR_PRPC |= (uint8_t)PR_SPI_bm)
01726 
01727 #define power_hiresc_enable()     (PR_PRPC &= (uint8_t)~(PR_HIRES_bm))
01728 #define power_hiresc_disable()    (PR_PRPC |= (uint8_t)PR_HIRES_bm)
01729 
01730 #define power_tc1c_enable()     (PR_PRPC &= (uint8_t)~(PR_TC1_bm))
01731 #define power_tc1c_disable()    (PR_PRPC |= (uint8_t)PR_TC1_bm)
01732 
01733 #define power_tc0c_enable()  (PR_PRPC &= (uint8_t)~(PR_TC0_bm))
01734 #define power_tc0c_disable() (PR_PRPC |= (uint8_t)PR_TC0_bm)
01735 #define power_tc0e_enable()  (PR_PRPE &= (uint8_t)~(PR_TC0_bm))
01736 #define power_tc0e_disable() (PR_PRPE |= (uint8_t)PR_TC0_bm)
01737 
01738 #define power_all_enable() \
01739 do { \
01740     PR_PRGEN &= (uint8_t)~(PR_LCD_bm|PR_USB_bm|PR_AES_bm|PR_RTC_bm|PR_EVSYS_bm|PR_DMA_bm); \
01741     PR_PRPA &= (uint8_t)~(PR_ADC_bm|PR_AC_bm); \
01742     PR_PRPB &= (uint8_t)~(PR_ADC_bm|PR_AC_bm); \
01743     PR_PRPC &= (uint8_t)~(PR_TWI_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
01744     PR_PRPE &= (uint8_t)~(PR_USART0_bm|PR_TC0_bm); \
01745     } while(0)
01746 
01747 #define power_all_disable() \
01748 do { \
01749     PR_PRGEN |= (uint8_t)(PR_LCD_bm|PR_USB_bm|PR_AES_bm|PR_RTC_bm|PR_EVSYS_bm|PR_DMA_bm); \
01750     PR_PRPA |= (uint8_t)(PR_ADC_bm|PR_AC_bm); \
01751     PR_PRPB |= (uint8_t)(PR_ADC_bm|PR_AC_bm); \
01752     PR_PRPC |= (uint8_t)(PR_TWI_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
01753     PR_PRPE |= (uint8_t)(PR_USART0_bm|PR_TC0_bm); \
01754     } while(0)
01755 
01756 #elif defined(__AVR_ATmega640__) \
01757 || defined(__AVR_ATmega1280__) \
01758 || defined(__AVR_ATmega1281__) \
01759 || defined(__AVR_ATmega2560__) \
01760 || defined(__AVR_ATmega2561__) 
01761 
01762 #define power_adc_enable()      (PRR0 &= (uint8_t)~(1 << PRADC))
01763 #define power_adc_disable()     (PRR0 |= (uint8_t)(1 << PRADC))
01764 
01765 #define power_spi_enable()      (PRR0 &= (uint8_t)~(1 << PRSPI))
01766 #define power_spi_disable()     (PRR0 |= (uint8_t)(1 << PRSPI))
01767 
01768 #define power_twi_enable()      (PRR0 &= (uint8_t)~(1 << PRTWI))
01769 #define power_twi_disable()     (PRR0 |= (uint8_t)(1 << PRTWI))
01770 
01771 #define power_timer0_enable()   (PRR0 &= (uint8_t)~(1 << PRTIM0))
01772 #define power_timer0_disable()  (PRR0 |= (uint8_t)(1 << PRTIM0))
01773 
01774 #define power_timer1_enable()   (PRR0 &= (uint8_t)~(1 << PRTIM1))
01775 #define power_timer1_disable()  (PRR0 |= (uint8_t)(1 << PRTIM1))
01776 
01777 #define power_timer2_enable()   (PRR0 &= (uint8_t)~(1 << PRTIM2))
01778 #define power_timer2_disable()  (PRR0 |= (uint8_t)(1 << PRTIM2))
01779 
01780 #define power_timer3_enable()   (PRR1 &= (uint8_t)~(1 << PRTIM3))
01781 #define power_timer3_disable()  (PRR1 |= (uint8_t)(1 << PRTIM3))
01782 
01783 #define power_timer4_enable()   (PRR1 &= (uint8_t)~(1 << PRTIM4))
01784 #define power_timer4_disable()  (PRR1 |= (uint8_t)(1 << PRTIM4))
01785 
01786 #define power_timer5_enable()   (PRR1 &= (uint8_t)~(1 << PRTIM5))
01787 #define power_timer5_disable()  (PRR1 |= (uint8_t)(1 << PRTIM5))
01788 
01789 #define power_usart0_enable()   (PRR0 &= (uint8_t)~(1 << PRUSART0))
01790 #define power_usart0_disable()  (PRR0 |= (uint8_t)(1 << PRUSART0))
01791 
01792 #define power_usart1_enable()   (PRR1 &= (uint8_t)~(1 << PRUSART1))
01793 #define power_usart1_disable()  (PRR1 |= (uint8_t)(1 << PRUSART1))
01794 
01795 #define power_usart2_enable()   (PRR1 &= (uint8_t)~(1 << PRUSART2))
01796 #define power_usart2_disable()  (PRR1 |= (uint8_t)(1 << PRUSART2))
01797 
01798 #define power_usart3_enable()   (PRR1 &= (uint8_t)~(1 << PRUSART3))
01799 #define power_usart3_disable()  (PRR1 |= (uint8_t)(1 << PRUSART3))
01800 
01801 #define power_all_enable() \
01802 do{ \
01803     PRR0 &= (uint8_t)~((1<<PRADC)|(1<<PRSPI)|(1<<PRTWI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTIM2)|(1<<PRUSART0)); \
01804     PRR1 &= (uint8_t)~((1<<PRTIM3)|(1<<PRTIM4)|(1<<PRTIM5)|(1<<PRTIM5)|(1<<PRUSART1)|(1<<PRUSART2)|(1<<PRUSART3)); \
01805 }while(0)
01806 
01807 #define power_all_disable() \
01808 do{ \
01809     PRR0 |= (uint8_t)((1<<PRADC)|(1<<PRSPI)|(1<<PRTWI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTIM2)|(1<<PRUSART0)); \
01810     PRR1 |= (uint8_t)((1<<PRTIM3)|(1<<PRTIM4)|(1<<PRTIM5)|(1<<PRTIM5)|(1<<PRUSART1)|(1<<PRUSART2)|(1<<PRUSART3)); \
01811 }while(0)
01812 
01813 
01814 #elif defined(__AVR_ATmega128RFA1__)
01815 
01816 #define power_adc_enable()      (PRR0 &= (uint8_t)~(1 << PRADC))
01817 #define power_adc_disable()     (PRR0 |= (uint8_t)(1 << PRADC))
01818 
01819 #define power_spi_enable()      (PRR0 &= (uint8_t)~(1 << PRSPI))
01820 #define power_spi_disable()     (PRR0 |= (uint8_t)(1 << PRSPI))
01821 
01822 #define power_twi_enable()      (PRR0 &= (uint8_t)~(1 << PRTWI))
01823 #define power_twi_disable()     (PRR0 |= (uint8_t)(1 << PRTWI))
01824 
01825 #define power_timer0_enable()   (PRR0 &= (uint8_t)~(1 << PRTIM0))
01826 #define power_timer0_disable()  (PRR0 |= (uint8_t)(1 << PRTIM0))
01827 
01828 #define power_timer1_enable()   (PRR0 &= (uint8_t)~(1 << PRTIM1))
01829 #define power_timer1_disable()  (PRR0 |= (uint8_t)(1 << PRTIM1))
01830 
01831 #define power_timer2_enable()   (PRR0 &= (uint8_t)~(1 << PRTIM2))
01832 #define power_timer2_disable()  (PRR0 |= (uint8_t)(1 << PRTIM2))
01833 
01834 #define power_timer3_enable()   (PRR1 &= (uint8_t)~(1 << PRTIM3))
01835 #define power_timer3_disable()  (PRR1 |= (uint8_t)(1 << PRTIM3))
01836 
01837 #define power_timer4_enable()   (PRR1 &= (uint8_t)~(1 << PRTIM4))
01838 #define power_timer4_disable()  (PRR1 |= (uint8_t)(1 << PRTIM4))
01839 
01840 #define power_timer5_enable()   (PRR1 &= (uint8_t)~(1 << PRTIM5))
01841 #define power_timer5_disable()  (PRR1 |= (uint8_t)(1 << PRTIM5))
01842 
01843 #define power_usart0_enable()   (PRR0 &= (uint8_t)~(1 << PRUSART0))
01844 #define power_usart0_disable()  (PRR0 |= (uint8_t)(1 << PRUSART0))
01845 
01846 #define power_usart1_enable()   (PRR1 &= (uint8_t)~(1 << PRUSART1))
01847 #define power_usart1_disable()  (PRR1 |= (uint8_t)(1 << PRUSART1))
01848 
01849 #define power_all_enable() \
01850 do{ \
01851     PRR0 &= (uint8_t)~((1<<PRADC)|(1<<PRSPI)|(1<<PRTWI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTIM2)|(1<<PRUSART0)); \
01852     PRR1 &= (uint8_t)~((1<<PRTIM3)|(1<<PRTIM4)|(1<<PRTIM5)|(1<<PRTIM5)|(1<<PRUSART1)); \
01853 }while(0)
01854 
01855 #define power_all_disable() \
01856 do{ \
01857     PRR0 |= (uint8_t)((1<<PRADC)|(1<<PRSPI)|(1<<PRTWI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTIM2)|(1<<PRUSART0)); \
01858     PRR1 |= (uint8_t)((1<<PRTIM3)|(1<<PRTIM4)|(1<<PRTIM5)|(1<<PRTIM5)|(1<<PRUSART1)); \
01859 }while(0)
01860 
01861 #elif defined(__AVR_ATmega256RFR2__) \
01862 || defined(__AVR_ATmega2564RFR2__) \
01863 || defined(__AVR_ATmega128RFR2__) \
01864 || defined(__AVR_ATmega1284RFR2__) \
01865 || defined(__AVR_ATmega64RFR2__) \
01866 || defined(__AVR_ATmega644RFR2__)
01867 
01868 #define power_adc_enable()           (PRR0 &= (uint8_t)~(1 << PRADC))
01869 #define power_adc_disable()          (PRR0 |= (uint8_t)(1 << PRADC))
01870 
01871 #define power_usart0_enable()        (PRR0 &= (uint8_t)~(1 << PRUSART0))
01872 #define power_usart0_disable()       (PRR0 |= (uint8_t)(1 << PRUSART0))
01873 
01874 #define power_spi_enable()           (PRR0 &= (uint8_t)~(1 << PRSPI))
01875 #define power_spi_disable()          (PRR0 |= (uint8_t)(1 << PRSPI))
01876 
01877 #define power_timer1_enable()        (PRR0 &= (uint8_t)~(1 << PRTIM1))
01878 #define power_timer1_disable()       (PRR0 |= (uint8_t)(1 << PRTIM1))
01879 
01880 #define power_pga_enable()           (PRR0 &= (uint8_t)~(1 << PRPGA))
01881 #define power_pga_disable()          (PRR0 |= (uint8_t)(1 << PRPGA))
01882 
01883 #define power_timer0_enable()        (PRR0 &= (uint8_t)~(1 << PRTIM0))
01884 #define power_timer0_disable()       (PRR0 |= (uint8_t)(1 << PRTIM0))
01885 
01886 #define power_timer2_enable()        (PRR0 &= (uint8_t)~(1 << PRTIM2))
01887 #define power_timer2_disable()       (PRR0 |= (uint8_t)(1 << PRTIM2))
01888 
01889 #define power_twi_enable()           (PRR0 &= (uint8_t)~(1 << PRTWI))
01890 #define power_twi_disable()          (PRR0 |= (uint8_t)(1 << PRTWI))
01891 
01892 #define power_usart1_enable()        (PRR1 &= (uint8_t)~(1 << PRUSART1))
01893 #define power_usart1_disable()       (PRR1 |= (uint8_t)(1 << PRUSART1))
01894 
01895 #define power_timer3_enable()        (PRR1 &= (uint8_t)~(1 << PRTIM3))
01896 #define power_timer3_disable()       (PRR1 |= (uint8_t)(1 << PRTIM3))
01897 
01898 #define power_timer4_enable()        (PRR1 &= (uint8_t)~(1 << PRTIM4))
01899 #define power_timer4_disable()       (PRR1 |= (uint8_t)(1 << PRTIM4))
01900 
01901 #define power_timer5_enable()        (PRR1 &= (uint8_t)~(1 << PRTIM5))
01902 #define power_timer5_disable()       (PRR1 |= (uint8_t)(1 << PRTIM5))
01903 
01904 #define power_transceiver_enable()   (PRR1 &= (uint8_t)~(1 << PRTRX24))
01905 #define power_transceiver_disable()  (PRR1 |= (uint8_t)(1 << PRTRX24))
01906 
01907 #define power_ram0_enable()          (PRR2 &= (uint8_t)~(1 << PRRAM0))
01908 #define power_ram0_disable()         (PRR2 |= (uint8_t)(1 << PRRAM0))
01909 
01910 #define power_ram1_enable()          (PRR2 &= (uint8_t)~(1 << PRRAM1))
01911 #define power_ram1_disable()         (PRR2 |= (uint8_t)(1 << PRRAM1))
01912 
01913 #define power_ram2_enable()          (PRR2 &= (uint8_t)~(1 << PRRAM2))
01914 #define power_ram2_disable()         (PRR2 |= (uint8_t)(1 << PRRAM2))
01915 
01916 #define power_ram3_enable()          (PRR2 &= (uint8_t)~(1 << PRRAM3))
01917 #define power_ram3_disable()         (PRR2 |= (uint8_t)(1 << PRRAM3))
01918 
01919 #define power_all_enable() \
01920 do{ \
01921     PRR0 &= (uint8_t)~((1<<PRADC)|(1<<PRSPI)|(1<<PRTWI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTIM2)|(1<<PRUSART0)); \
01922     PRR1 &= (uint8_t)~((1<<PRUSART1)|(1<<PRTIM3)|(1<<PRTIM4)|(1<<PRTIM5)|(1<<PRTRX24)); \
01923     PRR2 &= (uint8_t)~((1<<PRRAM0)|(1<<PRRAM1)|(1<<PRRAM2)|(1<<PRRAM3)); \
01924 }while(0)
01925 
01926 #define power_all_disable() \
01927 do{ \
01928     PRR0 |= (uint8_t)((1<<PRADC)|(1<<PRSPI)|(1<<PRTWI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTIM2)|(1<<PRUSART0)); \
01929     PRR1 |= (uint8_t)((1<<PRUSART1)|(1<<PRTIM3)|(1<<PRTIM4)|(1<<PRTIM5)|(1<<PRTRX24)); \
01930     PRR2 |= (uint8_t)((1<<PRRAM0)|(1<<PRRAM1)|(1<<PRRAM2)|(1<<PRRAM3)); \
01931 }while(0)
01932 
01933 #elif defined(__AVR_AT90USB646__) \
01934 || defined(__AVR_AT90USB647__) \
01935 || defined(__AVR_AT90USB1286__) \
01936 || defined(__AVR_AT90USB1287__)
01937 
01938 #define power_adc_enable()      (PRR0 &= (uint8_t)~(1 << PRADC))
01939 #define power_adc_disable()     (PRR0 |= (uint8_t)(1 << PRADC))
01940 
01941 #define power_spi_enable()      (PRR0 &= (uint8_t)~(1 << PRSPI))
01942 #define power_spi_disable()     (PRR0 |= (uint8_t)(1 << PRSPI))
01943 
01944 #define power_twi_enable()      (PRR0 &= (uint8_t)~(1 << PRTWI))
01945 #define power_twi_disable()     (PRR0 |= (uint8_t)(1 << PRTWI))
01946 
01947 #define power_timer0_enable()   (PRR0 &= (uint8_t)~(1 << PRTIM0))
01948 #define power_timer0_disable()  (PRR0 |= (uint8_t)(1 << PRTIM0))
01949 
01950 #define power_timer1_enable()   (PRR0 &= (uint8_t)~(1 << PRTIM1))
01951 #define power_timer1_disable()  (PRR0 |= (uint8_t)(1 << PRTIM1))
01952 
01953 #define power_timer2_enable()   (PRR0 &= (uint8_t)~(1 << PRTIM2))
01954 #define power_timer2_disable()  (PRR0 |= (uint8_t)(1 << PRTIM2))
01955 
01956 #define power_timer3_enable()   (PRR1 &= (uint8_t)~(1 << PRTIM3))
01957 #define power_timer3_disable()  (PRR1 |= (uint8_t)(1 << PRTIM3))
01958 
01959 #define power_usart1_enable()   (PRR1 &= (uint8_t)~(1 << PRUSART1))
01960 #define power_usart1_disable()  (PRR1 |= (uint8_t)(1 << PRUSART1))
01961 
01962 #define power_usb_enable()      (PRR1 &= (uint8_t)~(1 << PRUSB))
01963 #define power_usb_disable()     (PRR1 |= (uint8_t)(1 << PRUSB))
01964 
01965 #define power_all_enable() \
01966 do{ \
01967     PRR0 &= (uint8_t)~((1<<PRADC)|(1<<PRSPI)|(1<<PRTWI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTIM2)); \
01968     PRR1 &= (uint8_t)~((1<<PRTIM3)|(1<<PRUSART1)|(1<<PRUSB)); \
01969 }while(0)
01970 
01971 #define power_all_disable() \
01972 do{ \
01973     PRR0 |= (uint8_t)((1<<PRADC)|(1<<PRSPI)|(1<<PRTWI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTIM2)); \
01974     PRR1 |= (uint8_t)((1<<PRTIM3)|(1<<PRUSART1)|(1<<PRUSB)); \
01975 }while(0)
01976 
01977 
01978 #elif defined(__AVR_ATmega32U4__) \
01979 || defined(__AVR_ATmega16U4__)
01980 
01981 
01982 #define power_adc_enable()      (PRR0 &= (uint8_t)~(1 << PRADC))
01983 #define power_adc_disable()     (PRR0 |= (uint8_t)(1 << PRADC))
01984 
01985 #define power_usart0_enable()   (PRR0 &= (uint8_t)~(1 << PRUSART0))
01986 #define power_usart0_disable()  (PRR0 |= (uint8_t)(1 << PRUSART0))
01987 
01988 #define power_spi_enable()      (PRR0 &= (uint8_t)~(1 << PRSPI))
01989 #define power_spi_disable()     (PRR0 |= (uint8_t)(1 << PRSPI))
01990 
01991 #define power_twi_enable()      (PRR0 &= (uint8_t)~(1 << PRTWI))
01992 #define power_twi_disable()     (PRR0 |= (uint8_t)(1 << PRTWI))
01993 
01994 #define power_timer0_enable()   (PRR0 &= (uint8_t)~(1 << PRTIM0))
01995 #define power_timer0_disable()  (PRR0 |= (uint8_t)(1 << PRTIM0))
01996 
01997 #define power_timer1_enable()   (PRR0 &= (uint8_t)~(1 << PRTIM1))
01998 #define power_timer1_disable()  (PRR0 |= (uint8_t)(1 << PRTIM1))
01999 
02000 #define power_timer2_enable()   (PRR0 &= (uint8_t)~(1 << PRTIM2))
02001 #define power_timer2_disable()  (PRR0 |= (uint8_t)(1 << PRTIM2))
02002 
02003 #define power_timer3_enable()   (PRR1 &= (uint8_t)~(1 << PRTIM3))
02004 #define power_timer3_disable()  (PRR1 |= (uint8_t)(1 << PRTIM3))
02005 
02006 #define power_usart1_enable()   (PRR1 &= (uint8_t)~(1 << PRUSART1))
02007 #define power_usart1_disable()  (PRR1 |= (uint8_t)(1 << PRUSART1))
02008 
02009 #define power_usb_enable()      (PRR1 &= (uint8_t)~(1 << PRUSB))
02010 #define power_usb_disable()     (PRR1 |= (uint8_t)(1 << PRUSB))
02011 
02012 #define power_all_enable() \
02013 do{ \
02014     PRR0 &= (uint8_t)~((1<<PRADC)|(1<<PRUSART0)|(1<<PRSPI)|(1<<PRTWI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTIM2)); \
02015     PRR1 &= (uint8_t)~((1<<PRTIM3)|(1<<PRUSART1)|(1<<PRUSB)); \
02016 }while(0)
02017 
02018 #define power_all_disable() \
02019 do{ \
02020     PRR0 |= (uint8_t)((1<<PRADC)|(1<<PRUSART0)|(1<<PRSPI)|(1<<PRTWI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTIM2)); \
02021     PRR1 |= (uint8_t)((1<<PRTIM3)|(1<<PRUSART1)|(1<<PRUSB)); \
02022 }while(0)
02023 
02024 
02025 #elif defined(__AVR_ATmega32U6__)
02026 
02027 
02028 #define power_adc_enable()      (PRR0 &= (uint8_t)~(1 << PRADC))
02029 #define power_adc_disable()     (PRR0 |= (uint8_t)(1 << PRADC))
02030 
02031 #define power_spi_enable()      (PRR0 &= (uint8_t)~(1 << PRSPI))
02032 #define power_spi_disable()     (PRR0 |= (uint8_t)(1 << PRSPI))
02033 
02034 #define power_twi_enable()      (PRR0 &= (uint8_t)~(1 << PRTWI))
02035 #define power_twi_disable()     (PRR0 |= (uint8_t)(1 << PRTWI))
02036 
02037 #define power_timer0_enable()   (PRR0 &= (uint8_t)~(1 << PRTIM0))
02038 #define power_timer0_disable()  (PRR0 |= (uint8_t)(1 << PRTIM0))
02039 
02040 #define power_timer1_enable()   (PRR0 &= (uint8_t)~(1 << PRTIM1))
02041 #define power_timer1_disable()  (PRR0 |= (uint8_t)(1 << PRTIM1))
02042 
02043 #define power_timer2_enable()   (PRR0 &= (uint8_t)~(1 << PRTIM2))
02044 #define power_timer2_disable()  (PRR0 |= (uint8_t)(1 << PRTIM2))
02045 
02046 #define power_timer3_enable()   (PRR1 &= (uint8_t)~(1 << PRTIM3))
02047 #define power_timer3_disable()  (PRR1 |= (uint8_t)(1 << PRTIM3))
02048 
02049 #define power_usart1_enable()   (PRR1 &= (uint8_t)~(1 << PRUSART1))
02050 #define power_usart1_disable()  (PRR1 |= (uint8_t)(1 << PRUSART1))
02051 
02052 #define power_usb_enable()      (PRR1 &= (uint8_t)~(1 << PRUSB))
02053 #define power_usb_disable()     (PRR1 |= (uint8_t)(1 << PRUSB))
02054 
02055 #define power_all_enable() \
02056 do{ \
02057     PRR0 &= (uint8_t)~((1<<PRADC)|(1<<PRSPI)|(1<<PRTWI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTIM2)); \
02058     PRR1 &= (uint8_t)~((1<<PRTIM3)|(1<<PRUSART1)|(1<<PRUSB)); \
02059 }while(0)
02060 
02061 #define power_all_disable() \
02062 do{ \
02063     PRR0 |= (uint8_t)((1<<PRADC)|(1<<PRSPI)|(1<<PRTWI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTIM2)); \
02064     PRR1 |= (uint8_t)((1<<PRTIM3)|(1<<PRUSART1)|(1<<PRUSB)); \
02065 }while(0)
02066 
02067 
02068 #elif defined(__AVR_AT90PWM1__)
02069 
02070 #define power_adc_enable()      (PRR &= (uint8_t)~(1 << PRADC))
02071 #define power_adc_disable()     (PRR |= (uint8_t)(1 << PRADC))
02072 
02073 #define power_spi_enable()      (PRR &= (uint8_t)~(1 << PRSPI))
02074 #define power_spi_disable()     (PRR |= (uint8_t)(1 << PRSPI))
02075 
02076 #define power_timer0_enable()   (PRR &= (uint8_t)~(1 << PRTIM0))
02077 #define power_timer0_disable()  (PRR |= (uint8_t)(1 << PRTIM0))
02078 
02079 #define power_timer1_enable()   (PRR &= (uint8_t)~(1 << PRTIM1))
02080 #define power_timer1_disable()  (PRR |= (uint8_t)(1 << PRTIM1))
02081 
02082 /* Power Stage Controller 0 */
02083 #define power_psc0_enable()     (PRR &= (uint8_t)~(1 << PRPSC0))
02084 #define power_psc0_disable()    (PRR |= (uint8_t)(1 << PRPSC0))
02085 
02086 /* Power Stage Controller 1 */
02087 #define power_psc1_enable()     (PRR &= (uint8_t)~(1 << PRPSC1))
02088 #define power_psc1_disable()    (PRR |= (uint8_t)(1 << PRPSC1))
02089 
02090 /* Power Stage Controller 2 */
02091 #define power_psc2_enable()     (PRR &= (uint8_t)~(1 << PRPSC2))
02092 #define power_psc2_disable()    (PRR |= (uint8_t)(1 << PRPSC2))
02093 
02094 #define power_all_enable()      (PRR &= (uint8_t)~((1<<PRADC)|(1<<PRSPI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRPSC0)|(1<<PRPSC1)|(1<<PRPSC2)))
02095 #define power_all_disable()     (PRR |= (uint8_t)((1<<PRADC)|(1<<PRSPI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRPSC0)|(1<<PRPSC1)|(1<<PRPSC2)))
02096 
02097 
02098 #elif defined(__AVR_AT90PWM2__) \
02099 || defined(__AVR_AT90PWM2B__) \
02100 || defined(__AVR_AT90PWM3__) \
02101 || defined(__AVR_AT90PWM3B__) \
02102 || defined(__AVR_AT90PWM216__) \
02103 || defined(__AVR_AT90PWM316__)
02104 
02105 #define power_adc_enable()      (PRR &= (uint8_t)~(1 << PRADC))
02106 #define power_adc_disable()     (PRR |= (uint8_t)(1 << PRADC))
02107 
02108 #define power_spi_enable()      (PRR &= (uint8_t)~(1 << PRSPI))
02109 #define power_spi_disable()     (PRR |= (uint8_t)(1 << PRSPI))
02110 
02111 #define power_usart_enable()    (PRR &= (uint8_t)~(1 << PRUSART0))
02112 #define power_usart_disable()   (PRR |= (uint8_t)(1 << PRUSART0))
02113 
02114 #define power_timer0_enable()   (PRR &= (uint8_t)~(1 << PRTIM0))
02115 #define power_timer0_disable()  (PRR |= (uint8_t)(1 << PRTIM0))
02116 
02117 #define power_timer1_enable()   (PRR &= (uint8_t)~(1 << PRTIM1))
02118 #define power_timer1_disable()  (PRR |= (uint8_t)(1 << PRTIM1))
02119 
02120 /* Power Stage Controller 0 */
02121 #define power_psc0_enable()     (PRR &= (uint8_t)~(1 << PRPSC0))
02122 #define power_psc0_disable()    (PRR |= (uint8_t)(1 << PRPSC0))
02123 
02124 /* Power Stage Controller 1 */
02125 #define power_psc1_enable()     (PRR &= (uint8_t)~(1 << PRPSC1))
02126 #define power_psc1_disable()    (PRR |= (uint8_t)(1 << PRPSC1))
02127 
02128 /* Power Stage Controller 2 */
02129 #define power_psc2_enable()     (PRR &= (uint8_t)~(1 << PRPSC2))
02130 #define power_psc2_disable()    (PRR |= (uint8_t)(1 << PRPSC2))
02131 
02132 #define power_all_enable()      (PRR &= (uint8_t)~((1<<PRADC)|(1<<PRSPI)|(1<<PRUSART0)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRPSC0)|(1<<PRPSC1)|(1<<PRPSC2)))
02133 #define power_all_disable()     (PRR |= (uint8_t)((1<<PRADC)|(1<<PRSPI)|(1<<PRUSART0)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRPSC0)|(1<<PRPSC1)|(1<<PRPSC2)))
02134 
02135 
02136 #elif defined(__AVR_AT90PWM81__) \
02137 || defined(__AVR_AT90PWM161__)
02138 
02139 #define power_adc_enable()      (PRR &= (uint8_t)~(1 << PRADC))
02140 #define power_adc_disable()     (PRR |= (uint8_t)(1 << PRADC))
02141 
02142 #define power_spi_enable()      (PRR &= (uint8_t)~(1 << PRSPI))
02143 #define power_spi_disable()     (PRR |= (uint8_t)(1 << PRSPI))
02144 
02145 #define power_timer1_enable()   (PRR &= (uint8_t)~(1 << PRTIM1))
02146 #define power_timer1_disable()  (PRR |= (uint8_t)(1 << PRTIM1))
02147 
02148 /* Reduced Power Stage Controller */
02149 #define power_pscr_enable()     (PRR &= (uint8_t)~(1 << PRPSCR))
02150 #define power_pscr_disable()    (PRR |= (uint8_t)(1 << PRPSCR))
02151 
02152 /* Power Stage Controller 2 */
02153 #define power_psc2_enable()     (PRR &= (uint8_t)~(1 << PRPSC2))
02154 #define power_psc2_disable()    (PRR |= (uint8_t)(1 << PRPSC2))
02155 
02156 #define power_all_enable()      (PRR &= (uint8_t)~((1<<PRADC)|(1<<PRSPI)|(1<<PRTIM1)|(1<<PRPSCR)|(1<<PRPSC2)))
02157 #define power_all_disable()     (PRR |= (uint8_t)((1<<PRADC)|(1<<PRSPI)|(1<<PRTIM1)|(1<<PRPSCR)|(1<<PRPSC2)))
02158 
02159 
02160 #elif defined(__AVR_ATmega165__) \
02161 || defined(__AVR_ATmega165A__) \
02162 || defined(__AVR_ATmega165P__) \
02163 || defined(__AVR_ATmega165PA__) \
02164 || defined(__AVR_ATmega325__) \
02165 || defined(__AVR_ATmega325A__) \
02166 || defined(__AVR_ATmega325P__) \
02167 || defined(__AVR_ATmega325PA__) \
02168 || defined(__AVR_ATmega3250__) \
02169 || defined(__AVR_ATmega3250A__) \
02170 || defined(__AVR_ATmega3250P__) \
02171 || defined(__AVR_ATmega3250PA__) \
02172 || defined(__AVR_ATmega645__) \
02173 || defined(__AVR_ATmega645A__) \
02174 || defined(__AVR_ATmega645P__) \
02175 || defined(__AVR_ATmega6450__) \
02176 || defined(__AVR_ATmega6450A__) \
02177 || defined(__AVR_ATmega6450P__)
02178 
02179 #define power_adc_enable()      (PRR &= (uint8_t)~(1 << PRADC))
02180 #define power_adc_disable()     (PRR |= (uint8_t)(1 << PRADC))
02181 
02182 #define power_spi_enable()      (PRR &= (uint8_t)~(1 << PRSPI))
02183 #define power_spi_disable()     (PRR |= (uint8_t)(1 << PRSPI))
02184 
02185 #define power_usart0_enable()   (PRR &= (uint8_t)~(1 << PRUSART0))
02186 #define power_usart0_disable()  (PRR |= (uint8_t)(1 << PRUSART0))
02187 
02188 #define power_timer1_enable()   (PRR &= (uint8_t)~(1 << PRTIM1))
02189 #define power_timer1_disable()  (PRR |= (uint8_t)(1 << PRTIM1))
02190 
02191 #define power_all_enable()      (PRR &= (uint8_t)~((1<<PRADC)|(1<<PRSPI)|(1<<PRUSART0)|(1<<PRTIM1)))
02192 #define power_all_disable()     (PRR |= (uint8_t)((1<<PRADC)|(1<<PRSPI)|(1<<PRUSART0)|(1<<PRTIM1)))
02193 
02194 
02195 #elif defined(__AVR_ATmega169__) \
02196 || defined(__AVR_ATmega169A__) \
02197 || defined(__AVR_ATmega169P__) \
02198 || defined(__AVR_ATmega169PA__) \
02199 || defined(__AVR_ATmega329__) \
02200 || defined(__AVR_ATmega329A__) \
02201 || defined(__AVR_ATmega329P__) \
02202 || defined(__AVR_ATmega329PA__) \
02203 || defined(__AVR_ATmega3290__) \
02204 || defined(__AVR_ATmega3290A__) \
02205 || defined(__AVR_ATmega3290P__) \
02206 || defined(__AVR_ATmega3290PA__) \
02207 || defined(__AVR_ATmega649__) \
02208 || defined(__AVR_ATmega649A__) \
02209 || defined(__AVR_ATmega649P__) \
02210 || defined(__AVR_ATmega6490__) \
02211 || defined(__AVR_ATmega6490A__) \
02212 || defined(__AVR_ATmega6490P__)
02213 
02214 #define power_adc_enable()      (PRR &= (uint8_t)~(1 << PRADC))
02215 #define power_adc_disable()     (PRR |= (uint8_t)(1 << PRADC))
02216 
02217 #define power_spi_enable()      (PRR &= (uint8_t)~(1 << PRSPI))
02218 #define power_spi_disable()     (PRR |= (uint8_t)(1 << PRSPI))
02219 
02220 #define power_usart0_enable()   (PRR &= (uint8_t)~(1 << PRUSART0))
02221 #define power_usart0_disable()  (PRR |= (uint8_t)(1 << PRUSART0))
02222 
02223 #define power_timer1_enable()   (PRR &= (uint8_t)~(1 << PRTIM1))
02224 #define power_timer1_disable()  (PRR |= (uint8_t)(1 << PRTIM1))
02225 
02226 #define power_lcd_enable()      (PRR &= (uint8_t)~(1 << PRLCD))
02227 #define power_lcd_disable()     (PRR |= (uint8_t)(1 << PRLCD))
02228 
02229 #define power_all_enable()      (PRR &= (uint8_t)~((1<<PRADC)|(1<<PRSPI)|(1<<PRUSART0)|(1<<PRTIM1)|(1<<PRLCD)))
02230 #define power_all_disable()     (PRR |= (uint8_t)((1<<PRADC)|(1<<PRSPI)|(1<<PRUSART0)|(1<<PRTIM1)|(1<<PRLCD)))
02231 
02232 
02233 #elif defined(__AVR_ATmega164A__) \
02234 || defined(__AVR_ATmega164P__) \
02235 || defined(__AVR_ATmega324A__) \
02236 || defined(__AVR_ATmega324P__) \
02237 || defined(__AVR_ATmega324PA__) \
02238 || defined(__AVR_ATmega644P__) \
02239 || defined(__AVR_ATmega644A__) \
02240 || defined(__AVR_ATmega644PA__)
02241 
02242 #define power_adc_enable()      (PRR0 &= (uint8_t)~(1 << PRADC))
02243 #define power_adc_disable()     (PRR0 |= (uint8_t)(1 << PRADC))
02244 
02245 #define power_spi_enable()      (PRR0 &= (uint8_t)~(1 << PRSPI))
02246 #define power_spi_disable()     (PRR0 |= (uint8_t)(1 << PRSPI))
02247 
02248 #define power_usart0_enable()   (PRR0 &= (uint8_t)~(1 << PRUSART0))
02249 #define power_usart0_disable()  (PRR0 |= (uint8_t)(1 << PRUSART0))
02250 
02251 #define power_usart1_enable()   (PRR0 &= (uint8_t)~(1 << PRUSART1))
02252 #define power_usart1_disable()  (PRR0 |= (uint8_t)(1 << PRUSART1))
02253 
02254 #define power_timer0_enable()   (PRR0 &= (uint8_t)~(1 << PRTIM0))
02255 #define power_timer0_disable()  (PRR0 |= (uint8_t)(1 << PRTIM0))
02256 
02257 #define power_timer1_enable()   (PRR0 &= (uint8_t)~(1 << PRTIM1))
02258 #define power_timer1_disable()  (PRR0 |= (uint8_t)(1 << PRTIM1))
02259 
02260 #define power_timer2_enable()   (PRR0 &= (uint8_t)~(1 << PRTIM2))
02261 #define power_timer2_disable()  (PRR0 |= (uint8_t)(1 << PRTIM2))
02262 
02263 #define power_twi_enable()      (PRR0 &= (uint8_t)~(1 << PRTWI))
02264 #define power_twi_disable()     (PRR0 |= (uint8_t)(1 << PRTWI))
02265 
02266 #define power_all_enable()      (PRR0 &= (uint8_t)~((1<<PRADC)|(1<<PRSPI)|(1<<PRUSART0)|(1<<PRUSART1)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTIM2)|(1<<PRTWI)))
02267 #define power_all_disable()     (PRR0 |= (uint8_t)((1<<PRADC)|(1<<PRSPI)|(1<<PRUSART0)|(1<<PRUSART1)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTIM2)|(1<<PRTWI)))
02268 
02269 
02270 #elif defined(__AVR_ATmega644__) \
02271 || defined(__AVR_ATmega164PA__)
02272 
02273 #define power_adc_enable()      (PRR0 &= (uint8_t)~(1 << PRADC))
02274 #define power_adc_disable()     (PRR0 |= (uint8_t)(1 << PRADC))
02275 
02276 #define power_spi_enable()      (PRR0 &= (uint8_t)~(1 << PRSPI))
02277 #define power_spi_disable()     (PRR0 |= (uint8_t)(1 << PRSPI))
02278 
02279 #define power_usart0_enable()   (PRR0 &= (uint8_t)~(1 << PRUSART0))
02280 #define power_usart0_disable()  (PRR0 |= (uint8_t)(1 << PRUSART0))
02281 
02282 #define power_timer0_enable()   (PRR0 &= (uint8_t)~(1 << PRTIM0))
02283 #define power_timer0_disable()  (PRR0 |= (uint8_t)(1 << PRTIM0))
02284 
02285 #define power_timer1_enable()   (PRR0 &= (uint8_t)~(1 << PRTIM1))
02286 #define power_timer1_disable()  (PRR0 |= (uint8_t)(1 << PRTIM1))
02287 
02288 #define power_timer2_enable()   (PRR0 &= (uint8_t)~(1 << PRTIM2))
02289 #define power_timer2_disable()  (PRR0 |= (uint8_t)(1 << PRTIM2))
02290 
02291 #define power_twi_enable()      (PRR0 &= (uint8_t)~(1 << PRTWI))
02292 #define power_twi_disable()     (PRR0 |= (uint8_t)(1 << PRTWI))
02293 
02294 #define power_all_enable()      (PRR0 &= (uint8_t)~((1<<PRADC)|(1<<PRSPI)|(1<<PRUSART0)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTIM2)|(1<<PRTWI)))
02295 #define power_all_disable()     (PRR0 |= (uint8_t)((1<<PRADC)|(1<<PRSPI)|(1<<PRUSART0)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTIM2)|(1<<PRTWI)))
02296 
02297 
02298 #elif defined(__AVR_ATmega406__)
02299 
02300 #define power_twi_enable()      (PRR0 &= (uint8_t)~(1 << PRTWI))
02301 #define power_twi_disable()     (PRR0 |= (uint8_t)(1 << PRTWI))
02302 
02303 #define power_timer0_enable()   (PRR0 &= (uint8_t)~(1 << PRTIM0))
02304 #define power_timer0_disable()  (PRR0 |= (uint8_t)(1 << PRTIM0))
02305 
02306 #define power_timer1_enable()   (PRR0 &= (uint8_t)~(1 << PRTIM1))
02307 #define power_timer1_disable()  (PRR0 |= (uint8_t)(1 << PRTIM1))
02308 
02309 /* Voltage ADC */
02310 #define power_vadc_enable()     (PRR0 &= (uint8_t)~(1 << PRVADC))
02311 #define power_vadc_disable()    (PRR0 |= (uint8_t)(1 << PRVADC))
02312 
02313 #define power_all_enable()      (PRR0 &= (uint8_t)~((1<<PRTWI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRVADC)))
02314 #define power_all_disable()     (PRR0 |= (uint8_t)((1<<PRTWI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRVADC)))
02315 
02316 
02317 #elif defined(__AVR_ATmega48__) \
02318 || defined(__AVR_ATmega48A__) \
02319 || defined(__AVR_ATmega48PA__) \
02320 || defined(__AVR_ATmega48P__) \
02321 || defined(__AVR_ATmega88__) \
02322 || defined(__AVR_ATmega88A__) \
02323 || defined(__AVR_ATmega88P__) \
02324 || defined(__AVR_ATmega88PA__) \
02325 || defined(__AVR_ATmega168__) \
02326 || defined(__AVR_ATmega168A__) \
02327 || defined(__AVR_ATmega168P__) \
02328 || defined(__AVR_ATmega168PA__) \
02329 || defined(__AVR_ATmega328__) \
02330 || defined(__AVR_ATmega328P__) \
02331 || defined(__AVR_ATtiny441__) \
02332 || defined(__AVR_ATtiny828__) \
02333 || defined(__AVR_ATtiny841__) \
02334 || defined(__AVR_ATA6612C__) \
02335 || defined(__AVR_ATA6613C__) \
02336 || defined(__AVR_ATA6614Q__)  
02337 
02338 #define power_adc_enable()      (PRR &= (uint8_t)~(1 << PRADC))
02339 #define power_adc_disable()     (PRR |= (uint8_t)(1 << PRADC))
02340 
02341 #define power_spi_enable()      (PRR &= (uint8_t)~(1 << PRSPI))
02342 #define power_spi_disable()     (PRR |= (uint8_t)(1 << PRSPI))
02343 
02344 #define power_usart0_enable()   (PRR &= (uint8_t)~(1 << PRUSART0))
02345 #define power_usart0_disable()  (PRR |= (uint8_t)(1 << PRUSART0))
02346 
02347 #if defined(__AVR_ATtiny441__) \
02348 || defined(__AVR_ATtiny841__) 
02349 
02350 #define power_usart1_enable()   (PRR &= (uint8_t)~(1 << PRUSART1))
02351 #define power_usart1_disable()  (PRR |= (uint8_t)(1 << PRUSART1))
02352 
02353 #endif
02354 
02355 #define power_timer0_enable()   (PRR &= (uint8_t)~(1 << PRTIM0))
02356 #define power_timer0_disable()  (PRR |= (uint8_t)(1 << PRTIM0))
02357 
02358 #define power_timer1_enable()   (PRR &= (uint8_t)~(1 << PRTIM1))
02359 #define power_timer1_disable()  (PRR |= (uint8_t)(1 << PRTIM1))
02360 
02361 #if !defined(__AVR_ATtiny828__)
02362 
02363 #define power_timer2_enable()   (PRR &= (uint8_t)~(1 << PRTIM2))
02364 #define power_timer2_disable()  (PRR |= (uint8_t)(1 << PRTIM2))
02365 
02366 #endif
02367 
02368 #define power_twi_enable()      (PRR &= (uint8_t)~(1 << PRTWI))
02369 #define power_twi_disable()     (PRR |= (uint8_t)(1 << PRTWI))
02370 
02371 #if defined(__AVR_ATtiny828__)
02372 
02373 #define power_all_enable()      (PRR &= (uint8_t)~((1<<PRADC)|(1<<PRSPI)|(1<<PRUSART0)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTWI)))
02374 #define power_all_disable()     (PRR |= (uint8_t)((1<<PRADC)|(1<<PRSPI)|(1<<PRUSART0)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTWI)))
02375 
02376 #elif defined(__AVR_ATtiny441__) \
02377 || defined(__AVR_ATtiny841__) 
02378 
02379 #define power_all_enable()      (PRR &= (uint8_t)~((1<<PRADC)|(1<<PRSPI)|(1<<PRUSART0)|(1<<PRUSART1)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTIM2)|(1<<PRTWI)))
02380 #define power_all_disable()      (PRR |= (uint8_t)((1<<PRADC)|(1<<PRSPI)|(1<<PRUSART0)|(1<<PRUSART1)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTIM2)|(1<<PRTWI)))
02381 
02382 #else
02383 
02384 #define power_all_enable()      (PRR &= (uint8_t)~((1<<PRADC)|(1<<PRSPI)|(1<<PRUSART0)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTIM2)|(1<<PRTWI)))
02385 #define power_all_disable()     (PRR |= (uint8_t)((1<<PRADC)|(1<<PRSPI)|(1<<PRUSART0)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTIM2)|(1<<PRTWI)))
02386 
02387 #endif
02388 
02389 #elif defined(__AVR_ATtiny48__) \
02390 || defined(__AVR_ATtiny88__)
02391 
02392 #define power_adc_enable()      (PRR &= (uint8_t)~(1 << PRADC))
02393 #define power_adc_disable()     (PRR |= (uint8_t)(1 << PRADC))
02394 
02395 #define power_spi_enable()      (PRR &= (uint8_t)~(1 << PRSPI))
02396 #define power_spi_disable()     (PRR |= (uint8_t)(1 << PRSPI))
02397 
02398 #define power_timer0_enable()   (PRR &= (uint8_t)~(1 << PRTIM0))
02399 #define power_timer0_disable()  (PRR |= (uint8_t)(1 << PRTIM0))
02400 
02401 #define power_timer1_enable()   (PRR &= (uint8_t)~(1 << PRTIM1))
02402 #define power_timer1_disable()  (PRR |= (uint8_t)(1 << PRTIM1))
02403 
02404 #define power_twi_enable()      (PRR &= (uint8_t)~(1 << PRTWI))
02405 #define power_twi_disable()     (PRR |= (uint8_t)(1 << PRTWI))
02406 
02407 #define power_all_enable()      (PRR &= (uint8_t)~((1<<PRADC)|(1<<PRSPI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTWI)))
02408 #define power_all_disable()     (PRR |= (uint8_t)((1<<PRADC)|(1<<PRSPI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTWI)))
02409 
02410   
02411 #elif defined(__AVR_ATtiny24__) \
02412 || defined(__AVR_ATtiny24A__) \
02413 || defined(__AVR_ATtiny44__) \
02414 || defined(__AVR_ATtiny44A__) \
02415 || defined(__AVR_ATtiny84__) \
02416 || defined(__AVR_ATtiny84A__) \
02417 || defined(__AVR_ATtiny25__) \
02418 || defined(__AVR_ATtiny45__) \
02419 || defined(__AVR_ATtiny85__) \
02420 || defined(__AVR_ATtiny261__) \
02421 || defined(__AVR_ATtiny261A__) \
02422 || defined(__AVR_ATtiny461__) \
02423 || defined(__AVR_ATtiny461A__) \
02424 || defined(__AVR_ATtiny861__) \
02425 || defined(__AVR_ATtiny861A__) \
02426 || defined(__AVR_ATtiny43U__)
02427 
02428 #define power_adc_enable()      (PRR &= (uint8_t)~(1 << PRADC))
02429 #define power_adc_disable()     (PRR |= (uint8_t)(1 << PRADC))
02430 
02431 #define power_timer0_enable()   (PRR &= (uint8_t)~(1 << PRTIM0))
02432 #define power_timer0_disable()  (PRR |= (uint8_t)(1 << PRTIM0))
02433 
02434 #define power_timer1_enable()   (PRR &= (uint8_t)~(1 << PRTIM1))
02435 #define power_timer1_disable()  (PRR |= (uint8_t)(1 << PRTIM1))
02436 
02437 /* Universal Serial Interface */
02438 #define power_usi_enable()      (PRR &= (uint8_t)~(1 << PRUSI))
02439 #define power_usi_disable()     (PRR |= (uint8_t)(1 << PRUSI))
02440 
02441 #define power_all_enable()      (PRR &= (uint8_t)~((1<<PRADC)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRUSI)))
02442 #define power_all_disable()     (PRR |= (uint8_t)((1<<PRADC)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRUSI)))
02443 
02444 #elif defined(__AVR_ATmega1284__)
02445 
02446 #define power_adc_enable()      (PRR0 &= (uint8_t)~(1 << PRADC))
02447 #define power_adc_disable()     (PRR0 |= (uint8_t)(1 << PRADC))
02448 
02449 #define power_spi_enable()      (PRR0 &= (uint8_t)~(1 << PRSPI))
02450 #define power_spi_disable()     (PRR0 |= (uint8_t)(1 << PRSPI))
02451 
02452 #define power_twi_enable()      (PRR0 &= (uint8_t)~(1 << PRTWI))
02453 #define power_twi_disable()     (PRR0 |= (uint8_t)(1 << PRTWI))
02454 
02455 #define power_timer0_enable()   (PRR0 &= (uint8_t)~(1 << PRTIM0))
02456 #define power_timer0_disable()  (PRR0 |= (uint8_t)(1 << PRTIM0))
02457 
02458 #define power_timer1_enable()   (PRR0 &= (uint8_t)~(1 << PRTIM1))
02459 #define power_timer1_disable()  (PRR0 |= (uint8_t)(1 << PRTIM1))
02460 
02461 #define power_timer2_enable()   (PRR0 &= (uint8_t)~(1 << PRTIM2))
02462 #define power_timer2_disable()  (PRR0 |= (uint8_t)(1 << PRTIM2))
02463 
02464 #define power_timer3_enable()   (PRR1 &= (uint8_t)~(1 << PRTIM3))
02465 #define power_timer3_disable()  (PRR1 |= (uint8_t)(1 << PRTIM3))
02466 
02467 #define power_usart0_enable()   (PRR0 &= (uint8_t)~(1 << PRUSART0))
02468 #define power_usart0_disable()  (PRR0 |= (uint8_t)(1 << PRUSART0))
02469 
02470 #define power_all_enable() \
02471 do{ \
02472     PRR0 &= (uint8_t)~((1<<PRADC)|(1<<PRSPI)|(1<<PRTWI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTIM2)|(1<<PRUSART0)); \
02473     PRR1 &= (uint8_t)~(1<<PRTIM3); \
02474 }while(0)
02475 
02476 #define power_all_disable() \
02477 do{ \
02478     PRR0 |= (uint8_t)((1<<PRADC)|(1<<PRSPI)|(1<<PRTWI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTIM2)|(1<<PRUSART0)); \
02479     PRR1 |= (uint8_t)(1<<PRTIM3); \
02480 }while(0)
02481 
02482 #elif defined(__AVR_ATmega1284P__)
02483 
02484 
02485 #define power_adc_enable()      (PRR0 &= (uint8_t)~(1 << PRADC))
02486 #define power_adc_disable()     (PRR0 |= (uint8_t)(1 << PRADC))
02487 
02488 #define power_spi_enable()      (PRR0 &= (uint8_t)~(1 << PRSPI))
02489 #define power_spi_disable()     (PRR0 |= (uint8_t)(1 << PRSPI))
02490 
02491 #define power_twi_enable()      (PRR0 &= (uint8_t)~(1 << PRTWI))
02492 #define power_twi_disable()     (PRR0 |= (uint8_t)(1 << PRTWI))
02493 
02494 #define power_timer0_enable()   (PRR0 &= (uint8_t)~(1 << PRTIM0))
02495 #define power_timer0_disable()  (PRR0 |= (uint8_t)(1 << PRTIM0))
02496 
02497 #define power_timer1_enable()   (PRR0 &= (uint8_t)~(1 << PRTIM1))
02498 #define power_timer1_disable()  (PRR0 |= (uint8_t)(1 << PRTIM1))
02499 
02500 #define power_timer2_enable()   (PRR0 &= (uint8_t)~(1 << PRTIM2))
02501 #define power_timer2_disable()  (PRR0 |= (uint8_t)(1 << PRTIM2))
02502 
02503 #define power_timer3_enable()   (PRR1 &= (uint8_t)~(1 << PRTIM3))
02504 #define power_timer3_disable()  (PRR1 |= (uint8_t)(1 << PRTIM3))
02505 
02506 #define power_usart0_enable()   (PRR0 &= (uint8_t)~(1 << PRUSART0))
02507 #define power_usart0_disable()  (PRR0 |= (uint8_t)(1 << PRUSART0))
02508 
02509 #define power_usart1_enable()   (PRR0 &= (uint8_t)~(1 << PRUSART1))
02510 #define power_usart1_disable()  (PRR0 |= (uint8_t)(1 << PRUSART1))
02511 
02512 #define power_all_enable() \
02513 do{ \
02514     PRR0 &= (uint8_t)~((1<<PRADC)|(1<<PRSPI)|(1<<PRTWI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTIM2)|(1<<PRUSART0)|(1<<PRUSART1)); \
02515     PRR1 &= (uint8_t)~(1<<PRTIM3); \
02516 }while(0)
02517 
02518 #define power_all_disable() \
02519 do{ \
02520     PRR0 |= (uint8_t)((1<<PRADC)|(1<<PRSPI)|(1<<PRTWI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTIM2)|(1<<PRUSART0)|(1<<PRUSART1)); \
02521     PRR1 |= (uint8_t)(1<<PRTIM3); \
02522 }while(0)
02523 
02524 
02525 #elif defined(__AVR_ATmega32HVB__) \
02526 || defined(__AVR_ATmega32HVBrevB__) \
02527 || defined(__AVR_ATmega16HVB__) \
02528 || defined(__AVR_ATmega16HVBrevB__)
02529 
02530 
02531 #define power_twi_enable()      (PRR0 &= (uint8_t)~(1 << PRTWI))
02532 #define power_twi_disable()     (PRR0 |= (uint8_t)(1 << PRTWI))
02533 
02534 #define power_timer0_enable()   (PRR0 &= (uint8_t)~(1 << PRTIM0))
02535 #define power_timer0_disable()  (PRR0 |= (uint8_t)(1 << PRTIM0))
02536 
02537 #define power_timer1_enable()   (PRR0 &= (uint8_t)~(1 << PRTIM1))
02538 #define power_timer1_disable()  (PRR0 |= (uint8_t)(1 << PRTIM1))
02539 
02540 /* Voltage ADC */
02541 #define power_vadc_enable()     (PRR0 &= (uint8_t)~(1 << PRVADC))
02542 #define power_vadc_disable()    (PRR0 |= (uint8_t)(1 << PRVADC))
02543 
02544 #define power_spi_enable()      (PRR0 &= (uint8_t)~(1 << PRSPI))
02545 #define power_spi_disable()     (PRR0 |= (uint8_t)(1 << PRSPI))
02546 
02547 #define power_vrm_enable()      (PRR0 &= (uint8_t)~(1 << PRVRM))
02548 #define power_vrm_disable()     (PRR0 |= (uint8_t)(1 << PRVRM))
02549 
02550 #define power_all_enable()      (PRR0 &= (uint8_t)~((1<<PRTWI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRVADC)|(1<<PRSPI)|(1<<PRVRM)))
02551 #define power_all_disable()     (PRR0 |= (uint8_t)((1<<PRTWI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRVADC)|(1<<PRSPI)|(1<<PRVRM)))
02552 
02553 
02554 #elif defined (__AVR_ATA5790__) \
02555 || defined (__AVR_ATA5790N__) \
02556 || defined (__AVR_ATA5795__)
02557 
02558 // Enable the voltage monitor 
02559 #define power_vmonitor_enable()          (PRR0 &= (uint8_t)~(1 << PRVM))
02560 #define power_vmonitor_disable()         (PRR0 |= (uint8_t)(1 << PRVM))
02561 
02562 #define power_irdriver_enable()          (PRR0 &= (uint8_t)~(1 << PRDS))
02563 #define power_irdriver_disable()         (PRR0 |= (uint8_t)(1 << PRDS))
02564 
02565 #define power_crypto_enable()            (PRR0 &= (uint8_t)~(1 << PRCU))
02566 #define power_crypto_disable()           (PRR0 |= (uint8_t)(1 << PRCU))
02567 
02568 #define power_timermodulator_enable()    (PRR0 &= (uint8_t)~(1 << PRTM))
02569 #define power_timermodulator_disable()   (PRR0 |= (uint8_t)(1 << PRTM))
02570 
02571 #define power_timer1_enable()            (PRR0 &= (uint8_t)~(1 << PRT1))
02572 #define power_timer1_disable()           (PRR0 |= (uint8_t)(1 << PRT1))
02573 
02574 #define power_timer2_enable()            (PRR0 &= (uint8_t)~(1 << PRT2))
02575 #define power_timer2_disable()           (PRR0 |= (uint8_t)(1 << PRT2))
02576 
02577 #define power_timer3_enable()            (PRR0 &= (uint8_t)~(1 << PRT3))
02578 #define power_timer3_disable()           (PRR0 |= (uint8_t)(1 << PRT3))
02579 
02580 #define power_spi_enable()               (PRR1 &= (uint8_t)~(1 << PRSPI))
02581 #define power_spi_disable()              (PRR1 |= (uint8_t)(1 << PRSPI))
02582 
02583 #define power_cinterface_enable()        (PRR1 &= (uint8_t)~(1 << PRCI))
02584 #define power_cinterface_disable()       (PRR1 |= (uint8_t)(1 << PRCI))
02585 
02586 #if defined(__AVR_ATA5790__) \
02587 || defined(__AVR_ATA5790N__)
02588 
02589 #define power_lfreceiver_enable()        (PRR0 &= (uint8_t)~(1 << PRLFR))            
02590 #define power_lfreceiver_disable()       (PRR0 |= (uint8_t)(1 << PRLFR))            
02591 
02592 #define power_all_enable() \
02593 do{ \
02594     PRR0 &= (uint8_t)~((1<<PRVM)|(1<<PRDS)|(1<<PRCU)|(1<<PRTM)|(1<<PRT3)|(1<<PRT2)|(1<<PRT1)|(1<<PRLFR)); \
02595     PRR1 &= (uint8_t)~((1<<PRSPI)|(1<<PRCI)); \
02596 }while(0)
02597 
02598 #define power_all_disable() \
02599 do{ \
02600     PRR0 |= (uint8_t)((1<<PRVM)|(1<<PRDS)|(1<<PRCU)|(1<<PRTM)|(1<<PRT3)|(1<<PRT2)|(1<<PRT1)|(1<<PRLFR)); \
02601     PRR1 |= (uint8_t)((1<<PRSPI)|(1<<PRCI)); \
02602 }while(0)
02603 
02604 #elif defined(__AVR_ATA5795__)
02605 
02606 #define power_all_enable() \
02607 do{ \
02608     PRR0 &= (uint8_t)~((1<<PRVM)|(1<<PRDS)|(1<<PRCU)|(1<<PRTM)|(1<<PRT3)|(1<<PRT2)|(1<<PRT1)); \
02609     PRR1 &= (uint8_t)~((1<<PRSPI)|(1<<PRCI)); \
02610 }while(0)
02611 
02612 #define power_all_disable() \
02613 do{ \
02614     PRR0 |= (uint8_t)((1<<PRVM)|(1<<PRDS)|(1<<PRCU)|(1<<PRTM)|(1<<PRT3)|(1<<PRT2)|(1<<PRT1)); \
02615     PRR1 |= (uint8_t)((1<<PRSPI)|(1<<PRCI)); \
02616 }while(0)
02617 
02618 #endif
02619 
02620 #elif defined(__AVR_ATA5831__) \
02621 || defined(__AVR_ATA5702M322__) \
02622 || defined(__AVR_ATA5782__)
02623 
02624 #if defined(__AVR_ATA5702M322__) 
02625 
02626 #define power_twi_enable()              (PRR0 &= (uint8_t)~(1 << PRTWI))
02627 #define power_twi_disable()             (PRR0 &= (uint8_t)(1 << PRTWI))
02628 
02629 #define power_crypto_enable()            (PRR0 &= (uint8_t)~(1 << PRCU))
02630 #define power_crypto_disable()           (PRR0 |= (uint8_t)(1 << PRCU))
02631 
02632 #endif
02633 
02634 #define power_clock_output_enable()     (PRR0 &= (uint8_t)~(1 << PRCO))
02635 #define power_clock_output_disable()    (PRR0 |= (uint8_t)(1 << PRCO))
02636 
02637 #define power_voltage_monitor_enable()  (PRR0 &= (uint8_t)~(1 << PRVM))
02638 #define power_voltage_monitor_disable() (PRR0 |= (uint8_t)(1 << PRVM))
02639 
02640 #define power_crc_enable()              (PRR0 &= (uint8_t)~(1 << PRCRC))
02641 #define power_crc_disable()             (PRR0 |= (uint8_t)(1 << PRCRC))
02642 
02643 #define power_transmit_dsp_control_enable()     (PRR0 &= (uint8_t)~(1 << PRTXDC))
02644 #define power_transmit_dsp_control_disable()    (PRR0 |= (uint8_t)(1 << PRTXDC))
02645 
02646 #if defined(__AVR_ATA5831__) \
02647 || defined(__AVR_ATA5782__)
02648 
02649 #define power_receive_dsp_control_enable()      (PRR0 &= (uint8_t)~(1 << PRRXDC))
02650 #define power_receive_dsp_control_disable()     (PRR0 |= (uint8_t)(1 << PRRXDC))
02651 
02652 #endif
02653 
02654 #define power_spi_enable()              (PRR0 &= (uint8_t)~(1 << PRSPI))
02655 #define power_spi_disable()             (PRR0 |= (uint8_t)(1 << PRSPI))
02656 
02657 #if defined (__AVR_ATA5702M322__)
02658 
02659 #define power_cinterface_enable()        (PRR1 &= (uint8_t)~(1 << PRCI))
02660 #define power_cinterface_disable()       (PRR1 |= (uint8_t)(1 << PRCI))
02661 
02662 #define power_lfreceiver_enable()        (PRR1 &= (uint8_t)~(1 << PRLFR))            
02663 #define power_lfreceiver_disable()       (PRR1 |= (uint8_t)(1 << PRLFR))            
02664 
02665 #endif
02666 
02667 #define power_timer1_enable()           (PRR1 &= (uint8_t)~(1 << PRT1))
02668 #define power_timer1_disable()          (PRR1 |= (uint8_t)(1 << PRT1))
02669 
02670 #define power_timer2_enable()           (PRR1 &= (uint8_t)~(1 << PRT2))
02671 #define power_timer2_disable()          (PRR1 |= (uint8_t)(1 << PRT2))
02672 
02673 #define power_timer3_enable()           (PRR1 &= (uint8_t)~(1 << PRT3))
02674 #define power_timer3_disable()          (PRR1 |= (uint8_t)(1 << PRT3))
02675 
02676 #define power_timer4_enable()           (PRR1 &= (uint8_t)~(1 << PRT4))
02677 #define power_timer4_disable()          (PRR1 |= (uint8_t)(1 << PRT4))
02678 
02679 #define power_timer5_enable()           (PRR1 &= (uint8_t)~(1 << PRT5))
02680 #define power_timer5_disable()          (PRR1 |= (uint8_t)(1 << PRT5))
02681 
02682 #define power_sequencer_state_machine_enable()  (PRR2 &= (uint8_t)~(1 << PRSSM))
02683 #define power_sequencer_state_machine_disable() (PRR2 |= (uint8_t)(1 << PRSSM))
02684 
02685 #define power_tx_modulator_enable()     (PRR2 &= (uint8_t)~(1 << PRTM))
02686 #define power_tx_modulator_disable()    (PRR2 |= (uint8_t)(1 << PRTM))
02687 
02688 #if defined(__AVR_ATA5831__) \
02689 || defined(__AVR_ATA5782__)
02690 
02691 #define power_rssi_buffer_enable()      (PRR2 &= (uint8_t)~(1 << PRRS))
02692 #define power_rssi_buffer_disable()     (PRR2 |= (uint8_t)(1 << PRRS))
02693 
02694 #define power_id_scan_enable()          (PRR2 &= (uint8_t)~(1 << PRIDS))
02695 #define power_id_scan_disable()         (PRR2 |= (uint8_t)(1 << PRIDS))
02696 
02697 #define power_rx_buffer_A_enable()      (PRR2 &= (uint8_t)~(1 << PRXA))
02698 #define power_rx_buffer_A_disable()     (PRR2 |= (uint8_t)(1 << PRXA))
02699 
02700 #define power_rx_buffer_B_enable()      (PRR2 &= (uint8_t)~(1 << PRXB))
02701 #define power_rx_buffer_B_disable()     (PRR2 |= (uint8_t)(1 << PRXB))
02702 
02703 #endif
02704 
02705 #define power_data_fifo_enable()        (PRR2 &= (uint8_t)~(1 << PRDF))
02706 #define power_data_fifo_disable()       (PRR2 |= (uint8_t)(1 << PRDF))
02707 
02708 #define power_preamble_rssi_fifo_enable()       (PRR2 &= (uint8_t)~(1 << PRSF))
02709 #define power_preamble_rssi_fifo_disable()      (PRR2 |= (uint8_t)(1 << PRSF))
02710 
02711 #define power_rx_buffer_A_enable()      (PRR2 &= (uint8_t)~(1 << PRXA))
02712 #define power_rx_buffer_A_disable()     (PRR2 |= (uint8_t)(1 << PRXA))
02713 
02714 #define power_rx_buffer_B_enable()      (PRR2 &= (uint8_t)~(1 << PRXB))
02715 #define power_rx_buffer_B_disable()     (PRR2 |= (uint8_t)(1 << PRXB))
02716 
02717 #if defined(__AVR_ATA5831__) \
02718 || defined(__AVR_ATA5782__)
02719 
02720 #define power_all_enable() \
02721 do{ \
02722     PRR0 &= (uint8_t)~((1 << PRCO) | (1 << PRVM) | (1 << PRCRC) | (1 << PRTXDC) | (1 << PRRXDC) | (1 << PRSPI)); \
02723     PRR1 &= (uint8_t)~((1 << PRT1) | (1 << PRT2) | (1 << PRT3) | (1 << PRT4) | (1 << PRT5)); \
02724     PRR2 &= (uint8_t)~((1 << PRSSM) | (1 << PRTM) | (1 << PRRS) | (1 << PRIDS) | (1 << PRDF) | (1 << PRSF) | (1 << PRXA) | (1 << PRXB)); \
02725 }while(0)
02726 
02727 #define power_all_disable() \
02728 do{ \
02729     PRR0 |= (uint8_t)((1 << PRCO) | (1 << PRVM) | (1 << PRCRC) | (1 << PRTXDC) | (1 << PRRXDC) | (1 << PRSPI)); \
02730     PRR1 |= (uint8_t)((1 << PRT1) | (1 << PRT2) | (1 << PRT3) | (1 << PRT4) | (1 << PRT5)); \
02731     PRR2 |= (uint8_t)((1 << PRSSM) | (1 << PRTM) | (1 << PRRS) | (1 << PRIDS) | (1 << PRDF) | (1 << PRSF) | (1 << PRXA) | (1 << PRXB)); \
02732 }while(0)
02733 
02734 #elif defined (__AVR_ATA5702M322__)
02735 
02736 #define power_all_enable() \
02737 do{ \
02738     PRR0 &= (uint8_t)~((1 << PRTWI) | (1 << PRCU) | (1 << PRCO) | (1 << PRVM) | (1 << PRCRC) | (1 << PRTXDC) | (1 << PRSPI)); \
02739     PRR1 &= (uint8_t)~((1 << PRCI)  | (1 << PRLFR)| (1 << PRT1) | (1 << PRT2) | (1 << PRT3) | (1 << PRT4) | (1 << PRT5)); \
02740     PRR2 &= (uint8_t)~((1 << PRSSM) | (1 << PRTM) | (1 << PRDF) | (1 << PRSF)); \
02741 }while(0)
02742 
02743 #define power_all_disable() \
02744 do{ \
02745     PRR0 &= (uint8_t)((1 << PRTWI) | (1 << PRCU) | (1 << PRCO) | (1 << PRVM) | (1 << PRCRC) | (1 << PRTXDC) | (1 << PRSPI)); \
02746     PRR1 &= (uint8_t)((1 << PRCI)  | (1 << PRLFR)| (1 << PRT1) | (1 << PRT2) | (1 << PRT3) | (1 << PRT4) | (1 << PRT5)); \
02747     PRR2 &= (uint8_t)((1 << PRSSM) | (1 << PRTM) | (1 << PRDF) | (1 << PRSF)); \
02748 }while(0)
02749 
02750 #endif
02751 
02752 #elif defined(__AVR_ATmega64HVE__) \
02753 || defined(__AVR_ATmega64HVE2__) 
02754 
02755 #define power_lin_enable()      (PRR0 &= (uint8_t)~(1 << PRLIN))
02756 #define power_lin_disable()     (PRR0 |= (uint8_t)(1 << PRLIN))
02757 
02758 #define power_spi_enable()      (PRR0 &= (uint8_t)~(1 << PRSPI))
02759 #define power_spi_disable()     (PRR0 |= (uint8_t)(1 << PRSPI))
02760 
02761 #define power_timer0_enable()   (PRR0 &= (uint8_t)~(1 << PRTIM0))
02762 #define power_timer0_disable()  (PRR0 |= (uint8_t)(1 << PRTIM0))
02763 
02764 #define power_timer1_enable()   (PRR0 &= (uint8_t)~(1 << PRTIM1))
02765 #define power_timer1_disable()  (PRR0 |= (uint8_t)(1 << PRTIM1))
02766 
02767 #define power_all_enable()      (PRR0 &= (uint8_t)~((1<<PRLIN)|(1<<PRSPI)|(1<<PRTIM0)|(1<<PRTIM1)))
02768 #define power_all_disable()     (PRR0 |= (uint8_t)((1<<PRLIN)|(1<<PRSPI)|(1<<PRTIM0)|(1<<PRTIM1)))
02769 
02770 #elif defined(__AVR_ATmega16M1__) \
02771 || defined(__AVR_ATmega32C1__) \
02772 || defined(__AVR_ATmega32M1__) \
02773 || defined(__AVR_ATmega64C1__) \
02774 || defined(__AVR_ATmega64M1__)
02775 
02776 #define power_adc_enable()      (PRR &= (uint8_t)~(1 << PRADC))
02777 #define power_adc_disable()     (PRR |= (uint8_t)(1 << PRADC))
02778 
02779 #define power_lin_enable()      (PRR &= (uint8_t)~(1 << PRLIN))
02780 #define power_lin_disable()     (PRR |= (uint8_t)(1 << PRLIN))
02781 
02782 #define power_spi_enable()      (PRR &= (uint8_t)~(1 << PRSPI))
02783 #define power_spi_disable()     (PRR |= (uint8_t)(1 << PRSPI))
02784 
02785 #define power_timer0_enable()   (PRR &= (uint8_t)~(1 << PRTIM0))
02786 #define power_timer0_disable()  (PRR |= (uint8_t)(1 << PRTIM0))
02787 
02788 #define power_timer1_enable()   (PRR &= (uint8_t)~(1 << PRTIM1))
02789 #define power_timer1_disable()  (PRR |= (uint8_t)(1 << PRTIM1))
02790 
02791 #define power_psc_enable()      (PRR &= (uint8_t)~(1 << PRPSC))
02792 #define power_psc_disable()     (PRR |= (uint8_t)(1 << PRPSC))
02793 
02794 #define power_can_enable()      (PRR &= (uint8_t)~(1 << PRCAN))
02795 #define power_can_disable()     (PRR |= (uint8_t)(1 << PRCAN))
02796 
02797 #define power_all_enable()      (PRR &= (uint8_t)~((1<<PRADC)|(1<<PRLIN)|(1<<PRSPI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRPSC)|(1<<PRCAN)))
02798 #define power_all_disable()     (PRR |= (uint8_t)((1<<PRADC)|(1<<PRLIN)|(1<<PRSPI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRPSC)|(1<<PRCAN)))
02799 
02800 
02801 #elif defined(__AVR_ATtiny167__) \
02802 || defined(__AVR_ATtiny87__) \
02803 || defined(__AVR_ATA5505__) \
02804 || defined(__AVR_ATA5272__) \
02805 || defined(__AVR_ATA6616C__) \
02806 || defined(__AVR_ATA6617C__) \
02807 || defined(__AVR_ATA664251__)
02808 
02809 #define power_adc_enable()      (PRR &= (uint8_t)~(1 << PRADC))
02810 #define power_adc_disable()     (PRR |= (uint8_t)(1 << PRADC))
02811 
02812 #define power_usi_enable()      (PRR &= (uint8_t)~(1 << PRUSI))
02813 #define power_usi_disable()     (PRR |= (uint8_t)(1 << PRUSI))
02814 
02815 #define power_timer0_enable()   (PRR &= (uint8_t)~(1 << PRTIM0))
02816 #define power_timer0_disable()  (PRR |= (uint8_t)(1 << PRTIM0))
02817 
02818 #define power_timer1_enable()   (PRR &= (uint8_t)~(1 << PRTIM1))
02819 #define power_timer1_disable()  (PRR |= (uint8_t)(1 << PRTIM1))
02820 
02821 #define power_spi_enable()      (PRR &= (uint8_t)~(1 << PRSPI))
02822 #define power_spi_disable()     (PRR |= (uint8_t)(1 << PRSPI))
02823 
02824 #define power_lin_enable()      (PRR &= (uint8_t)~(1 << PRLIN))
02825 #define power_lin_disable()     (PRR |= (uint8_t)(1 << PRLIN))
02826 
02827 #define power_all_enable()      (PRR &= (uint8_t)~((1<<PRADC)|(1<<PRUSI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRSPI)|(1<<PRLIN)))
02828 #define power_all_disable()     (PRR |= (uint8_t)((1<<PRADC)|(1<<PRUSI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRSPI)|(1<<PRLIN)))
02829 
02830 
02831 #elif defined(__AVR_ATtiny1634__)
02832 
02833 #define power_adc_enable()      (PRR &= (uint8_t)~(1 << PRADC))
02834 #define power_adc_disable()     (PRR |= (uint8_t)(1 << PRADC))
02835 
02836 #define power_usart0_enable()      (PRR &= (uint8_t)~(1 << PRUSART0))
02837 #define power_usart0_disable()     (PRR |= (uint8_t)(1 << PRUSART0))
02838 
02839 #define power_usart1_enable()      (PRR &= (uint8_t)~(1 << PRUSART1))
02840 #define power_usart1_disable()     (PRR |= (uint8_t)(1 << PRUSART1))
02841 
02842 #define power_usi_enable()      (PRR &= (uint8_t)~(1 << PRUSI))
02843 #define power_usi_disable()     (PRR |= (uint8_t)(1 << PRUSI))
02844 
02845 #define power_timer0_enable()   (PRR &= (uint8_t)~(1 << PRTIM0))
02846 #define power_timer0_disable()  (PRR |= (uint8_t)(1 << PRTIM0))
02847 
02848 #define power_timer1_enable()   (PRR &= (uint8_t)~(1 << PRTIM1))
02849 #define power_timer1_disable()  (PRR |= (uint8_t)(1 << PRTIM1))
02850 
02851 #define power_twi_enable()      (PRR &= (uint8_t)~(1 << PRTWI))
02852 #define power_twi_disable()     (PRR |= (uint8_t)(1 << PRTWI))
02853 
02854 #define power_all_enable()      (PRR &= (uint8_t)~((1 << PRTWI)|(1 << PRUSI)|(1 << PRTIM0)|(1 << PRTIM1)|(1 << PRUSART0)|(1 << PRUSART1)|(1 << PRADC)))
02855 #define power_all_disable()     (PRR |= (uint8_t)((1 << PRTWI)|(1 << PRUSI)|(1 << PRTIM0)|(1 << PRTIM1)|(1 << PRUSART0)|(1 << PRUSART1)|(1 << PRADC)))
02856 
02857 
02858 #elif defined(__AVR_AT90USB82__) \
02859 || defined(__AVR_AT90USB162__) \
02860 || defined(__AVR_ATmega8U2__) \
02861 || defined(__AVR_ATmega16U2__) \
02862 || defined(__AVR_ATmega32U2__)
02863 
02864 #define power_spi_enable()      (PRR0 &= (uint8_t)~(1 << PRSPI))
02865 #define power_spi_disable()     (PRR0 |= (uint8_t)(1 << PRSPI))
02866 
02867 #define power_timer0_enable()   (PRR0 &= (uint8_t)~(1 << PRTIM0))
02868 #define power_timer0_disable()  (PRR0 |= (uint8_t)(1 << PRTIM0))
02869 
02870 #define power_timer1_enable()   (PRR0 &= (uint8_t)~(1 << PRTIM1))
02871 #define power_timer1_disable()  (PRR0 |= (uint8_t)(1 << PRTIM1))
02872 
02873 #define power_usb_enable()      (PRR1 &= (uint8_t)~(1 << PRUSB))
02874 #define power_usb_disable()     (PRR1 |= (uint8_t)(1 << PRUSB))
02875 
02876 #define power_usart1_enable()   (PRR1 &= (uint8_t)~(1 << PRUSART1))
02877 #define power_usart1_disable()  (PRR1 |= (uint8_t)(1 << PRUSART1))
02878 
02879 #define power_all_enable() \
02880 do{ \
02881     PRR0 &= (uint8_t)~((1<<PRSPI)|(1<<PRTIM0)|(1<<PRTIM1)); \
02882     PRR1 &= (uint8_t)~((1<<PRUSB)|(1<<PRUSART1)); \
02883 }while(0)
02884 
02885 #define power_all_disable() \
02886 do{ \
02887     PRR0 |= (uint8_t)((1<<PRSPI)|(1<<PRTIM0)|(1<<PRTIM1)); \
02888     PRR1 |= (uint8_t)((1<<PRUSB)|(1<<PRUSART1)); \
02889 }while(0)
02890 
02891 
02892 #elif defined(__AVR_AT90SCR100__)
02893 
02894 #define power_usart0_enable()   (PRR0 &= (uint8_t)~(1 << PRUSART0))
02895 #define power_usart0_disable()  (PRR0 |= (uint8_t)(1 << PRUSART0))
02896 
02897 #define power_spi_enable()      (PRR0 &= (uint8_t)~(1 << PRSPI))
02898 #define power_spi_disable()     (PRR0 |= (uint8_t)(1 << PRSPI))
02899 
02900 #define power_timer1_enable()   (PRR0 &= (uint8_t)~(1 << PRTIM1))
02901 #define power_timer1_disable()  (PRR0 |= (uint8_t)(1 << PRTIM1))
02902 
02903 #define power_timer0_enable()   (PRR0 &= (uint8_t)~(1 << PRTIM0))
02904 #define power_timer0_disable()  (PRR0 |= (uint8_t)(1 << PRTIM0))
02905 
02906 #define power_timer2_enable()   (PRR0 &= (uint8_t)~(1 << PRTIM2))
02907 #define power_timer2_disable()  (PRR0 |= (uint8_t)(1 << PRTIM2))
02908 
02909 #define power_twi_enable()      (PRR0 &= (uint8_t)~(1 << PRTWI))
02910 #define power_twi_disable()     (PRR0 |= (uint8_t)(1 << PRTWI))
02911 
02912 #define power_usbh_enable()     (PRR1 &= (uint8_t)~(1 << PRUSBH))
02913 #define power_usbh_disable()    (PRR1 |= (uint8_t)(1 << PRUSBH))
02914 
02915 #define power_usb_enable()      (PRR1 &= (uint8_t)~(1 << PRUSB))
02916 #define power_usb_disable()     (PRR1 |= (uint8_t)(1 << PRUSB))
02917 
02918 #define power_hsspi_enable()    (PRR1 &= (uint8_t)~(1 << PRHSSPI))
02919 #define power_hsspi_disable()   (PRR1 |= (uint8_t)(1 << PRHSSPI))
02920 
02921 #define power_sci_enable()      (PRR1 &= (uint8_t)~(1 << PRSCI))
02922 #define power_sci_disable()     (PRR1 |= (uint8_t)(1 << PRSCI))
02923 
02924 #define power_aes_enable()      (PRR1 &= (uint8_t)~(1 << PRAES))
02925 #define power_aes_disable()     (PRR1 |= (uint8_t)(1 << PRAES))
02926 
02927 #define power_kb_enable()       (PRR1 &= (uint8_t)~(1 << PRKB))
02928 #define power_kb_disable()      (PRR1 |= (uint8_t)(1 << PRKB))
02929 
02930 #define power_all_enable() \
02931 do{ \
02932     PRR0 &= (uint8_t)~((1<<PRUSART0)|(1<<PRSPI)|(1<<PRTIM1)|(1<<PRTIM0)|(1<<PRTIM2)|(1<<PRTWI)); \
02933     PRR1 &= (uint8_t)~((1<<PRUSBH)|(1<<PRUSB)|(1<<PRHSSPI)|(1<<PRSCI)|(1<<PRAES)|(1<<PRKB)); \
02934 }while(0)
02935 
02936 #define power_all_disable() \
02937 do{ \
02938     PRR0 |= (uint8_t)((1<<PRUSART0)|(1<<PRSPI)|(1<<PRTIM1)|(1<<PRTIM0)|(1<<PRTIM2)|(1<<PRTWI)); \
02939     PRR1 |= (uint8_t)((1<<PRUSBH)|(1<<PRUSB)|(1<<PRHSSPI)|(1<<PRSCI)|(1<<PRAES)|(1<<PRKB)); \
02940 }while(0)
02941 
02942 
02943 #elif defined(__AVR_ATtiny4__) \
02944 || defined(__AVR_ATtiny5__) \
02945 || defined(__AVR_ATtiny9__) \
02946 || defined(__AVR_ATtiny10__) \
02947 || defined(__AVR_ATtiny13A__) \
02948 
02949 #define power_adc_enable()   (PRR &= (uint8_t)~(1 << PRADC))
02950 #define power_adc_disable()  (PRR |= (uint8_t)(1 << PRADC))
02951 
02952 #define power_timer0_enable()   (PRR &= (uint8_t)~(1 << PRTIM0))
02953 #define power_timer0_disable()  (PRR |= (uint8_t)(1 << PRTIM0))
02954 
02955 #define power_all_enable()      (PRR &= (uint8_t)~((1<<PRADC)|(1<<PRTIM0)))
02956 #define power_all_disable()     (PRR |= (uint8_t)((1<<PRADC)|(1<<PRTIM0)))
02957 
02958 
02959 #elif defined(__AVR_ATtiny20__) \
02960 || defined(__AVR_ATtiny40__)
02961 
02962 #define power_adc_enable()   (PRR &= (uint8_t)~(1 << PRADC))
02963 #define power_adc_disable()  (PRR |= (uint8_t)(1 << PRADC))
02964 
02965 #define power_timer0_enable()   (PRR &= (uint8_t)~(1 << PRTIM0))
02966 #define power_timer0_disable()  (PRR |= (uint8_t)(1 << PRTIM0))
02967 
02968 #define power_timer1_enable()   (PRR &= (uint8_t)~(1 << PRTIM1))
02969 #define power_timer1_disable()  (PRR |= (uint8_t)(1 << PRTIM1))
02970 
02971 #define power_spi_enable()   (PRR &= (uint8_t)~(1 << PRSPI))
02972 #define power_spi_disable()  (PRR |= (uint8_t)(1 << PRSPI))
02973 
02974 #define power_twi_enable()   (PRR &= (uint8_t)~(1 << PRTWI))
02975 #define power_twi_disable()  (PRR |= (uint8_t)(1 << PRTWI))
02976 
02977 #define power_all_enable()      (PRR &= (uint8_t)~((1<<PRADC)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRSPI)|(1<<PRTWI)))
02978 #define power_all_disable()     (PRR |= (uint8_t)((1<<PRADC)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRSPI)|(1<<PRTWI)))
02979 
02980 #endif
02981 
02982 
02983 #if defined(__AVR_AT90CAN32__) \
02984 || defined(__AVR_AT90CAN64__) \
02985 || defined(__AVR_AT90CAN128__) \
02986 || defined(__AVR_AT90PWM1__) \
02987 || defined(__AVR_AT90PWM2__) \
02988 || defined(__AVR_AT90PWM2B__) \
02989 || defined(__AVR_AT90PWM3__) \
02990 || defined(__AVR_AT90PWM3B__) \
02991 || defined(__AVR_AT90PWM81__) \
02992 || defined(__AVR_AT90PWM161__) \
02993 || defined(__AVR_AT90PWM216__) \
02994 || defined(__AVR_AT90PWM316__) \
02995 || defined(__AVR_AT90SCR100__) \
02996 || defined(__AVR_AT90USB646__) \
02997 || defined(__AVR_AT90USB647__) \
02998 || defined(__AVR_AT90USB82__) \
02999 || defined(__AVR_AT90USB1286__) \
03000 || defined(__AVR_AT90USB1287__) \
03001 || defined(__AVR_AT90USB162__) \
03002 || defined(__AVR_ATA5505__) \
03003 || defined(__AVR_ATA5272__) \
03004 || defined(__AVR_ATA6617C__) \
03005 || defined(__AVR_ATA664251__) \
03006 || defined(__AVR_ATmega1280__) \
03007 || defined(__AVR_ATmega1281__) \
03008 || defined(__AVR_ATmega1284__) \
03009 || defined(__AVR_ATmega128RFA1__) \
03010 || defined(__AVR_ATmega128RFR2__) \
03011 || defined(__AVR_ATmega1284RFR2__) \
03012 || defined(__AVR_ATmega1284P__) \
03013 || defined(__AVR_ATmega162__) \
03014 || defined(__AVR_ATmega164A__) \
03015 || defined(__AVR_ATmega164P__) \
03016 || defined(__AVR_ATmega164PA__) \
03017 || defined(__AVR_ATmega165__) \
03018 || defined(__AVR_ATmega165A__) \
03019 || defined(__AVR_ATmega165P__) \
03020 || defined(__AVR_ATmega165PA__) \
03021 || defined(__AVR_ATmega168__) \
03022 || defined(__AVR_ATmega168A__) \
03023 || defined(__AVR_ATmega168P__) \
03024 || defined(__AVR_ATmega168PA__) \
03025 || defined(__AVR_ATmega169__) \
03026 || defined(__AVR_ATmega169A__) \
03027 || defined(__AVR_ATmega169P__) \
03028 || defined(__AVR_ATmega169PA__) \
03029 || defined(__AVR_ATmega16M1__) \
03030 || defined(__AVR_ATmega16U2__) \
03031 || defined(__AVR_ATmega324PA__) \
03032 || defined(__AVR_ATmega16U4__) \
03033 || defined(__AVR_ATmega2560__) \
03034 || defined(__AVR_ATmega2561__) \
03035 || defined(__AVR_ATmega256RFR2__) \
03036 || defined(__AVR_ATmega2564RFR2__) \
03037 || defined(__AVR_ATmega324A__) \
03038 || defined(__AVR_ATmega324P__) \
03039 || defined(__AVR_ATmega325__) \
03040 || defined(__AVR_ATmega325A__) \
03041 || defined(__AVR_ATmega325P__) \
03042 || defined(__AVR_ATmega325PA__) \
03043 || defined(__AVR_ATmega3250__) \
03044 || defined(__AVR_ATmega3250A__) \
03045 || defined(__AVR_ATmega3250P__) \
03046 || defined(__AVR_ATmega3250PA__) \
03047 || defined(__AVR_ATmega328__) \
03048 || defined(__AVR_ATmega328P__) \
03049 || defined(__AVR_ATmega329__) \
03050 || defined(__AVR_ATmega329A__) \
03051 || defined(__AVR_ATmega329P__) \
03052 || defined(__AVR_ATmega329PA__) \
03053 || defined(__AVR_ATmega3290__) \
03054 || defined(__AVR_ATmega3290A__) \
03055 || defined(__AVR_ATmega3290P__) \
03056 || defined(__AVR_ATmega3290PA__) \
03057 || defined(__AVR_ATmega32C1__) \
03058 || defined(__AVR_ATmega32M1__) \
03059 || defined(__AVR_ATmega32U2__) \
03060 || defined(__AVR_ATmega32U4__) \
03061 || defined(__AVR_ATmega32U6__) \
03062 || defined(__AVR_ATmega48__) \
03063 || defined(__AVR_ATmega48A__) \
03064 || defined(__AVR_ATmega48PA__) \
03065 || defined(__AVR_ATmega48P__) \
03066 || defined(__AVR_ATmega640__) \
03067 || defined(__AVR_ATmega649P__) \
03068 || defined(__AVR_ATmega644__) \
03069 || defined(__AVR_ATmega644A__) \
03070 || defined(__AVR_ATmega644P__) \
03071 || defined(__AVR_ATmega644PA__) \
03072 || defined(__AVR_ATmega645__) \
03073 || defined(__AVR_ATmega645A__) \
03074 || defined(__AVR_ATmega645P__) \
03075 || defined(__AVR_ATmega6450__) \
03076 || defined(__AVR_ATmega6450A__) \
03077 || defined(__AVR_ATmega6450P__) \
03078 || defined(__AVR_ATmega649__) \
03079 || defined(__AVR_ATmega649A__) \
03080 || defined(__AVR_ATmega64M1__) \
03081 || defined(__AVR_ATmega64C1__) \
03082 || defined(__AVR_ATmega88A__) \
03083 || defined(__AVR_ATmega88PA__) \
03084 || defined(__AVR_ATmega6490__) \
03085 || defined(__AVR_ATmega6490A__) \
03086 || defined(__AVR_ATmega6490P__) \
03087 || defined(__AVR_ATmega64RFR2__) \
03088 || defined(__AVR_ATmega644RFR2__) \
03089 || defined(__AVR_ATmega88__) \
03090 || defined(__AVR_ATmega88P__) \
03091 || defined(__AVR_ATmega8U2__) \
03092 || defined(__AVR_ATmega16U2__) \
03093 || defined(__AVR_ATmega32U2__) \
03094 || defined(__AVR_ATtiny48__) \
03095 || defined(__AVR_ATtiny88__) \
03096 || defined(__AVR_ATtiny87__) \
03097 || defined(__AVR_ATtiny167__) \
03098 || defined(__DOXYGEN__)
03099 
03100 
03101 /** \addtogroup avr_power
03102 
03103 Some of the newer AVRs contain a System Clock Prescale Register (CLKPR) that
03104 allows you to decrease the system clock frequency and the power consumption
03105 when the need for processing power is low.
03106 On some earlier AVRs (ATmega103, ATmega64, ATmega128), similar
03107 functionality can be achieved through the XTAL Divide Control Register.
03108 Below are two macros and an enumerated type that can be used to
03109 interface to the Clock Prescale Register or
03110 XTAL Divide Control Register.
03111 
03112 \note Not all AVR devices have a clock prescaler. On those devices
03113 without a Clock Prescale Register or XTAL Divide Control Register, these
03114 macros are not available.
03115 */
03116 
03117 
03118 /** \addtogroup avr_power
03119 \code 
03120 typedef enum
03121 {
03122     clock_div_1 = 0,
03123     clock_div_2 = 1,
03124     clock_div_4 = 2,
03125     clock_div_8 = 3,
03126     clock_div_16 = 4,
03127     clock_div_32 = 5,
03128     clock_div_64 = 6,
03129     clock_div_128 = 7,
03130     clock_div_256 = 8,
03131     clock_div_1_rc = 15, // ATmega128RFA1 only
03132 } clock_div_t;
03133 \endcode
03134 Clock prescaler setting enumerations for device using
03135 System Clock Prescale Register.
03136 
03137 \code
03138 typedef enum
03139 {
03140     clock_div_1 = 1,
03141     clock_div_2 = 2,
03142     clock_div_4 = 4,
03143     clock_div_8 = 8,
03144     clock_div_16 = 16,
03145     clock_div_32 = 32,
03146     clock_div_64 = 64,
03147     clock_div_128 = 128
03148 } clock_div_t;
03149 \endcode
03150 Clock prescaler setting enumerations for device using
03151 XTAL Divide Control Register.
03152 
03153 */
03154 typedef enum
03155 {
03156     clock_div_1 = 0,
03157     clock_div_2 = 1,
03158     clock_div_4 = 2,
03159     clock_div_8 = 3,
03160     clock_div_16 = 4,
03161     clock_div_32 = 5,
03162     clock_div_64 = 6,
03163     clock_div_128 = 7,
03164     clock_div_256 = 8
03165 #if defined(__AVR_ATmega128RFA1__) \
03166 || defined(__AVR_ATmega256RFR2__) \
03167 || defined(__AVR_ATmega2564RFR2__) \
03168 || defined(__AVR_ATmega128RFR2__) \
03169 || defined(__AVR_ATmega1284RFR2__) \
03170 || defined(__AVR_ATmega64RFR2__) \
03171 || defined(__AVR_ATmega644RFR2__)
03172     , clock_div_1_rc = 15
03173 #endif
03174 } clock_div_t;
03175 
03176 
03177 static __inline__ void clock_prescale_set(clock_div_t) __attribute__((__always_inline__));
03178 
03179 /** \addtogroup avr_power
03180 \code clock_prescale_set(x) \endcode
03181 
03182 Set the clock prescaler register select bits, selecting a system clock
03183 division setting. This function is inlined, even if compiler
03184 optimizations are disabled.
03185 
03186 The type of \c x is \c clock_div_t.
03187 
03188 \note For device with XTAL Divide Control Register (XDIV), \c x can actually range
03189 from 1 to 129. Thus, one does not need to use \c clock_div_t type as argument.
03190 */
03191 void clock_prescale_set(clock_div_t __x)
03192 {
03193     uint8_t __tmp = _BV(CLKPCE);
03194     __asm__ __volatile__ (
03195         "in __tmp_reg__,__SREG__" "\n\t"
03196         "cli" "\n\t"
03197         "sts %1, %0" "\n\t"
03198         "sts %1, %2" "\n\t"
03199         "out __SREG__, __tmp_reg__"
03200         : /* no outputs */
03201         : "d" (__tmp),
03202           "M" (_SFR_MEM_ADDR(CLKPR)),
03203           "d" (__x)
03204         : "r0");
03205 }
03206 
03207 /** \addtogroup avr_power
03208 \code clock_prescale_get() \endcode
03209 Gets and returns the clock prescaler register setting. The return type is \c clock_div_t.
03210 
03211 \note For device with XTAL Divide Control Register (XDIV), return can actually
03212 range from 1 to 129. Care should be taken has the return value could differ from the
03213 typedef enum clock_div_t. This should only happen if clock_prescale_set was previously
03214 called with a value other than those defined by \c clock_div_t.
03215 */
03216 #define clock_prescale_get()  (clock_div_t)(CLKPR & (uint8_t)((1<<CLKPS0)|(1<<CLKPS1)|(1<<CLKPS2)|(1<<CLKPS3)))
03217 
03218 #elif defined(__AVR_ATmega16HVB__) \
03219 || defined(__AVR_ATmega16HVBrevB__) \
03220 || defined(__AVR_ATmega64HVE__) \
03221 || defined(__AVR_ATmega32HVB__) \
03222 || defined(__AVR_ATmega32HVBrevB__) \
03223 || defined(__AVR_ATmega64HVE2__)
03224 
03225 typedef enum
03226 {
03227     clock_div_1 = 0,
03228     clock_div_2 = 1,
03229     clock_div_4 = 2,
03230     clock_div_8 = 3
03231 } clock_div_t;
03232 
03233 static __inline__ void clock_prescale_set(clock_div_t) __attribute__((__always_inline__));
03234 
03235 void clock_prescale_set(clock_div_t __x)
03236 {
03237     uint8_t __tmp = _BV(CLKPCE);
03238     __asm__ __volatile__ (
03239         "in __tmp_reg__,__SREG__" "\n\t"
03240         "cli" "\n\t"
03241         "sts %1, %0" "\n\t"
03242         "sts %1, %2" "\n\t"
03243         "out __SREG__, __tmp_reg__"
03244         : /* no outputs */
03245         : "d" (__tmp),
03246           "M" (_SFR_MEM_ADDR(CLKPR)),
03247           "d" (__x)
03248         : "r0");
03249 }
03250 
03251 #define clock_prescale_get()  (clock_div_t)(CLKPR & (uint8_t)((1<<CLKPS0)|(1<<CLKPS1)))
03252 
03253 #elif defined(__AVR_ATA5790__) \
03254 || defined (__AVR_ATA5790N__) \
03255 || defined (__AVR_ATA5795__)
03256 
03257 typedef enum
03258 {
03259     clock_div_1 = 0,
03260     clock_div_2 = 1,
03261     clock_div_4 = 2,
03262     clock_div_8 = 3,
03263     clock_div_16 = 4,
03264     clock_div_32 = 5,
03265     clock_div_64 = 6,
03266     clock_div_128 = 7,
03267 } clock_div_t;
03268 
03269 static __inline__ void system_clock_prescale_set(clock_div_t) __attribute__((__always_inline__));
03270 
03271 void system_clock_prescale_set(clock_div_t __x)
03272 {
03273     uint8_t __tmp = _BV(CLKPCE);
03274     __asm__ __volatile__ (
03275         "in __tmp_reg__,__SREG__" "\n\t"
03276         "cli" "\n\t"
03277         "out %1, %0" "\n\t"
03278         "out %1, %2" "\n\t"
03279         "out __SREG__, __tmp_reg__"
03280         : /* no outputs */
03281         : "d" (__tmp),
03282           "I" (_SFR_IO_ADDR(CLKPR)),
03283           "d" (__x)
03284         : "r0");
03285 }
03286 
03287 #define system_clock_prescale_get()  (clock_div_t)(CLKPR & (uint8_t)((1<<CLKPS0)|(1<<CLKPS1)|(1<<CLKPS2)))
03288 
03289 typedef enum
03290 {
03291     timer_clock_div_reset = 0,
03292     timer_clock_div_1 = 1,
03293     timer_clock_div_2 = 2,
03294     timer_clock_div_4 = 3,
03295     timer_clock_div_8 = 4,
03296     timer_clock_div_16 = 5,
03297     timer_clock_div_32 = 6,
03298     timer_clock_div_64 = 7
03299 } timer_clock_div_t;
03300 
03301 static __inline__ void timer_clock_prescale_set(timer_clock_div_t) __attribute__((__always_inline__));
03302 
03303 void timer_clock_prescale_set(timer_clock_div_t __x)
03304 {
03305     uint8_t __t;
03306     __asm__ __volatile__ (
03307         "in __tmp_reg__,__SREG__" "\n\t"
03308         "cli" "\n\t"
03309         "in %[temp],%[clkpr]" "\n\t"
03310         "out %[clkpr],%[enable]" "\n\t"
03311         "andi %[temp],%[not_CLTPS]" "\n\t"
03312         "or %[temp], %[set_value]" "\n\t"
03313         "out %[clkpr],%[temp]" "\n\t"
03314         "sei" "\n\t"
03315         "out __SREG__,__tmp_reg__" "\n\t"
03316         : /* no outputs */
03317         : [temp] "r" (__t),
03318           [clkpr] "I" (_SFR_IO_ADDR(CLKPR)),
03319           [enable] "r" (_BV(CLKPCE)),
03320           [not_CLTPS] "M" (0xFF & (~ ((1 << CLTPS2) | (1 << CLTPS1) | (1 << CLTPS0)))),
03321           [set_value] "r" ((__x & 7) << 3)
03322         : "r0");
03323 }
03324 
03325 #define timer_clock_prescale_get()  (timer_clock_div_t)(CLKPR & (uint8_t)((1<<CLTPS0)|(1<<CLTPS1)|(1<<CLTPS2)))
03326 
03327 #elif defined(__AVR_ATA6285__) \
03328 || defined(__AVR_ATA6286__) \
03329 || defined(__AVR_ATA6289__) \
03330 || defined(__AVR_ATA5702M322__) \
03331 || defined(__AVR_ATA5782__) \
03332 || defined(__AVR_ATA5831__) 
03333 
03334 typedef enum
03335 {
03336     clock_div_1 = 0,
03337     clock_div_2 = 1,
03338     clock_div_4 = 2,
03339     clock_div_8 = 3,
03340     clock_div_16 = 4,
03341     clock_div_32 = 5,
03342     clock_div_64 = 6,
03343     clock_div_128 = 7
03344 } clock_div_t;
03345 
03346 static __inline__ void system_clock_prescale_set(clock_div_t) __attribute__((__always_inline__));
03347 
03348 void system_clock_prescale_set(clock_div_t __x)
03349 {
03350     uint8_t __t;
03351     __asm__ __volatile__ (
03352         "in __tmp_reg__,__SREG__" "\n\t"
03353         "cli" "\n\t"
03354         "in %[temp],%[clpr]" "\n\t"
03355         "out %[clpr],%[enable]" "\n\t"
03356         "andi %[temp],%[not_CLKPS]" "\n\t"
03357         "or %[temp], %[set_value]" "\n\t"
03358         "out %[clpr],%[temp]" "\n\t"
03359         "sei" "\n\t"
03360         "out __SREG__,__tmp_reg__" "\n\t"
03361         : /* no outputs */
03362         : [temp] "r" (__t),
03363 #if defined(__AVR_ATA6286__) \
03364 || defined(__AVR_ATA6285__) \
03365 || defined(__AVR_ATA6289__)
03366           [clpr] "I" (_SFR_IO_ADDR(CLKPR)),
03367 #elif defined(__AVR_ATA5831__) \
03368 || defined(__AVR_ATA5702M322__) \
03369 || defined(__AVR_ATA5782__)
03370           [clpr] "I" (_SFR_IO_ADDR(CLPR)),
03371 #endif
03372           [enable] "r" _BV(CLPCE),
03373           [not_CLKPS] "M" (0xFF & (~ ((1 << CLKPS2) | (1 << CLKPS1) | (1 << CLKPS0)))),
03374           [set_value] "r" (__x & 7)
03375         : "r0");
03376 }
03377 
03378 #if defined(__AVR_ATA6286__) \
03379 || defined(__AVR_ATA6285__) \
03380 || defined(__AVR_ATA6289__)
03381 
03382        #define system_clock_prescale_get()  (clock_div_t)(CLKPR & (uint8_t)((1<<CLKPS0)|(1<<CLKPS1)|(1<<CLKPS2)))
03383 
03384 #elif defined(__AVR_ATA5831__) \
03385 || defined(__AVR_ATA5702M322__) \
03386 || defined(__AVR_ATA5782__)
03387 
03388        #define system_clock_prescale_get()  (clock_div_t)(CLPR & (uint8_t)((1<<CLKPS0)|(1<<CLKPS1)|(1<<CLKPS2)))
03389 
03390 #endif
03391 
03392 typedef enum
03393 {
03394     timer_clock_div_reset = 0,
03395     timer_clock_div_1 = 1,
03396     timer_clock_div_2 = 2,
03397     timer_clock_div_4 = 3,
03398     timer_clock_div_8 = 4,
03399     timer_clock_div_16 = 5,
03400     timer_clock_div_32 = 6,
03401     timer_clock_div_64 = 7
03402 } timer_clock_div_t;
03403 
03404 static __inline__ void timer_clock_prescale_set(timer_clock_div_t) __attribute__((__always_inline__));
03405 
03406 void timer_clock_prescale_set(timer_clock_div_t __x)
03407 {
03408     uint8_t __t;
03409     __asm__ __volatile__ (
03410         "in __tmp_reg__,__SREG__" "\n\t"
03411         "cli" "\n\t"
03412         "in %[temp],%[clpr]" "\n\t"
03413         "out %[clpr],%[enable]" "\n\t"
03414         "andi %[temp],%[not_CLTPS]" "\n\t"
03415         "or %[temp], %[set_value]" "\n\t"
03416         "out %[clpr],%[temp]" "\n\t"
03417         "sei" "\n\t"
03418         "out __SREG__,__tmp_reg__" "\n\t"
03419         : /* no outputs */
03420         : [temp] "r" (__t),
03421 #if defined(__AVR_ATA6286__) \
03422 || defined(__AVR_ATA6285__) \
03423 || defined(__AVR_ATA6289__)
03424           [clpr] "I" (_SFR_IO_ADDR(CLKPR)),
03425 #elif defined(__AVR_ATA5831__) \
03426 || defined(__AVR_ATA5702M322__) \
03427 || defined(__AVR_ATA5782__)
03428          [clpr] "I" (_SFR_IO_ADDR(CLPR)),
03429 #endif
03430           [enable] "r" (_BV(CLPCE)),      
03431           [not_CLTPS] "M" (0xFF & (~ ((1 << CLTPS2) | (1 << CLTPS1) | (1 << CLTPS0)))),
03432           [set_value] "r" ((__x & 7) << 3)
03433         : "r0");
03434 }
03435 
03436 #if defined(__AVR_ATA6286__) \
03437 || defined(__AVR_ATA6285__) \
03438 || defined(__AVR_ATA6289__)
03439 
03440           #define timer_clock_prescale_get()  (timer_clock_div_t)(CLKPR & (uint8_t)((1<<CLTPS0)|(1<<CLTPS1)|(1<<CLTPS2)))
03441 
03442 #elif defined(__AVR_ATA5831__) \
03443 || defined(__AVR_ATA5702M322__) \
03444 || defined(__AVR_ATA5782__)
03445 
03446           #define timer_clock_prescale_get()  (timer_clock_div_t)(CLPR & (uint8_t)((1<<CLTPS0)|(1<<CLTPS1)|(1<<CLTPS2)))
03447 #endif
03448 
03449 #elif defined(__AVR_ATtiny24__) \
03450 || defined(__AVR_ATtiny24A__) \
03451 || defined(__AVR_ATtiny44__) \
03452 || defined(__AVR_ATtiny44A__) \
03453 || defined(__AVR_ATtiny84__) \
03454 || defined(__AVR_ATtiny84A__) \
03455 || defined(__AVR_ATtiny25__) \
03456 || defined(__AVR_ATtiny45__) \
03457 || defined(__AVR_ATtiny85__) \
03458 || defined(__AVR_ATtiny261A__) \
03459 || defined(__AVR_ATtiny261__) \
03460 || defined(__AVR_ATtiny461__) \
03461 || defined(__AVR_ATtiny461A__) \
03462 || defined(__AVR_ATtiny861__) \
03463 || defined(__AVR_ATtiny861A__) \
03464 || defined(__AVR_ATtiny2313__) \
03465 || defined(__AVR_ATtiny2313A__) \
03466 || defined(__AVR_ATtiny4313__) \
03467 || defined(__AVR_ATtiny13__) \
03468 || defined(__AVR_ATtiny13A__) \
03469 || defined(__AVR_ATtiny43U__) \
03470 
03471 typedef enum
03472 {
03473     clock_div_1 = 0,
03474     clock_div_2 = 1,
03475     clock_div_4 = 2,
03476     clock_div_8 = 3,
03477     clock_div_16 = 4,
03478     clock_div_32 = 5,
03479     clock_div_64 = 6,
03480     clock_div_128 = 7,
03481     clock_div_256 = 8
03482 } clock_div_t;
03483 
03484 static __inline__ void clock_prescale_set(clock_div_t) __attribute__((__always_inline__));
03485 
03486 void clock_prescale_set(clock_div_t __x)
03487 {
03488     uint8_t __tmp = _BV(CLKPCE);
03489     __asm__ __volatile__ (
03490         "in __tmp_reg__,__SREG__" "\n\t"
03491         "cli" "\n\t"
03492         "out %1, %0" "\n\t"
03493         "out %1, %2" "\n\t"
03494         "out __SREG__, __tmp_reg__"
03495         : /* no outputs */
03496         : "d" (__tmp),
03497           "I" (_SFR_IO_ADDR(CLKPR)),
03498           "d" (__x)
03499         : "r0");
03500 }
03501 
03502 
03503 #define clock_prescale_get()  (clock_div_t)(CLKPR & (uint8_t)((1<<CLKPS0)|(1<<CLKPS1)|(1<<CLKPS2)|(1<<CLKPS3)))
03504 
03505 #elif defined(__AVR_ATtiny441__) \
03506 || defined(__AVR_ATtiny841__)
03507 
03508 typedef enum
03509 {
03510     clock_div_1 = 0,
03511     clock_div_2 = 1,
03512     clock_div_4 = 2,
03513     clock_div_8 = 3,
03514     clock_div_16 = 4,
03515     clock_div_32 = 5,
03516     clock_div_64 = 6,
03517     clock_div_128 = 7,
03518     clock_div_256 = 8
03519 } clock_div_t;
03520 
03521 static __inline__ void clock_prescale_set(clock_div_t) __attribute__((__always_inline__));
03522 
03523 void clock_prescale_set(clock_div_t __x)
03524 {
03525     
03526     __asm__ __volatile__ (
03527         "in __tmp_reg__,__SREG__" "\n\t"
03528         "cli" "\n\t"
03529         "sts %2, %3" "\n\t"
03530         "sts %1, %0" "\n\t"
03531         "out __SREG__, __tmp_reg__"
03532         : /* no outputs */
03533         : "d" (__x),
03534           "M" (_SFR_MEM_ADDR(CLKPR)),
03535           "M" (_SFR_MEM_ADDR(CCP)),
03536           "r" ((uint8_t)0xD8)
03537         : "r0");
03538 }
03539 
03540 
03541 #define clock_prescale_get()  (clock_div_t)(CLKPR & (uint8_t)((1<<CLKPS0)|(1<<CLKPS1)|(1<<CLKPS2)|(1<<CLKPS3)))
03542 
03543 #elif defined(__AVR_ATtiny4__) \
03544 || defined(__AVR_ATtiny5__) \
03545 || defined(__AVR_ATtiny9__) \
03546 || defined(__AVR_ATtiny10__) \
03547 || defined(__AVR_ATtiny20__) \
03548 || defined(__AVR_ATtiny40__) \
03549 
03550 typedef enum 
03551 { 
03552     clock_div_1 = 0, 
03553     clock_div_2 = 1, 
03554     clock_div_4 = 2, 
03555     clock_div_8 = 3, 
03556     clock_div_16 = 4, 
03557     clock_div_32 = 5, 
03558     clock_div_64 = 6, 
03559     clock_div_128 = 7, 
03560     clock_div_256 = 8 
03561 } clock_div_t; 
03562 
03563 static __inline__ void clock_prescale_set(clock_div_t) __attribute__((__always_inline__));
03564 
03565 void clock_prescale_set(clock_div_t __x)
03566 {
03567     uint8_t __tmp = 0xD8;
03568     __asm__ __volatile__ (
03569         "in __tmp_reg__,__SREG__" "\n\t"
03570         "cli" "\n\t"
03571         "out %1, %0" "\n\t"
03572         "out %2, %3" "\n\t"
03573         "out __SREG__, __tmp_reg__"
03574         : /* no outputs */
03575         : "d" (__tmp),
03576           "I" (_SFR_IO_ADDR(CCP)),
03577           "I" (_SFR_IO_ADDR(CLKPSR)),
03578           "d" (__x)
03579         : "r16");
03580 }
03581 
03582 #define clock_prescale_get()  (clock_div_t)(CLKPSR & (uint8_t)((1<<CLKPS0)|(1<<CLKPS1)|(1<<CLKPS2)|(1<<CLKPS3)))
03583 
03584 #elif defined(__AVR_ATmega64__) \
03585 || defined(__AVR_ATmega103__) \
03586 || defined(__AVR_ATmega128__)
03587 
03588 //Enum is declared for code compatibility
03589 typedef enum
03590 {
03591     clock_div_1 = 1,
03592     clock_div_2 = 2,
03593     clock_div_4 = 4,
03594     clock_div_8 = 8,
03595     clock_div_16 = 16,
03596     clock_div_32 = 32,
03597     clock_div_64 = 64,
03598     clock_div_128 = 128
03599 } clock_div_t;
03600 
03601 static __inline__ void clock_prescale_set(clock_div_t) __attribute__((__always_inline__));
03602 
03603 void clock_prescale_set(clock_div_t __x)
03604 {
03605     if((__x <= 0) || (__x > 129))
03606     {
03607         return;//Invalid value.
03608     }
03609     else
03610     {
03611         uint8_t __tmp = 0;
03612         //Algo explained:
03613         //1 - Clear XDIV in order for it to accept a new value (actually only
03614         //    XDIVEN need to be cleared, but clearing XDIV is faster than
03615         //    read-modify-write since we will rewrite XDIV later anyway)
03616         //2 - wait 8 clock cycle for stability, see datasheet erreta
03617         //3 - Exist if requested prescaller is 1
03618         //4 - Calculate XDIV6..0 value = 129 - __x
03619         //5 - Set XDIVEN bit in calculated value
03620         //6 - write XDIV with calculated value
03621         //7 - wait 8 clock cycle for stability, see datasheet erreta
03622         __asm__ __volatile__ (
03623             "in __tmp_reg__,__SREG__" "\n\t"
03624             "cli" "\n\t"
03625             "out %1, __zero_reg__" "\n\t"
03626             "nop" "\n\t"
03627             "nop" "\n\t"
03628             "nop" "\n\t"
03629             "nop" "\n\t"
03630             "nop" "\n\t"
03631             "nop" "\n\t"
03632             "nop" "\n\t"
03633             "nop" "\n\t"
03634             "cpi %0, 0x01" "\n\t"
03635             "breq L_%=" "\n\t"
03636             "ldi %2, 0x81" "\n\t" //129
03637             "sub %2, %0" "\n\t"
03638             "ori %2, 0x80" "\n\t" //128
03639             "out %1, %2" "\n\t"
03640             "nop" "\n\t"
03641             "nop" "\n\t"
03642             "nop" "\n\t"
03643             "nop" "\n\t"
03644             "nop" "\n\t"
03645             "nop" "\n\t"
03646             "nop" "\n\t"
03647             "nop" "\n\t"
03648             "L_%=: " "out __SREG__, __tmp_reg__"
03649             : /* no outputs */
03650             :"d" (__x),
03651              "I" (_SFR_IO_ADDR(XDIV)),
03652              "d" (__tmp)
03653             : "r0");
03654     }
03655 }
03656 
03657 static __inline__ clock_div_t clock_prescale_get(void) __attribute__((__always_inline__));
03658 
03659 clock_div_t clock_prescale_get(void)
03660 {
03661     if(bit_is_clear(XDIV, XDIVEN))
03662     {
03663         return 1;
03664     }
03665     else
03666     {
03667         return (clock_div_t)(129 - (XDIV & 0x7F));
03668     }
03669 }
03670  
03671 #endif
03672 
03673 #endif /* _AVR_POWER_H_ */

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